Lines Matching refs:SPI_REG
51 sys_write32((SF_SCKDIV_DIV_MASK & div), SPI_REG(dev, REG_SCKDIV)); in spi_config()
56 sys_set_bit(SPI_REG(dev, REG_SCKMODE), SF_SCKMODE_POL); in spi_config()
59 sys_clear_bit(SPI_REG(dev, REG_SCKMODE), SF_SCKMODE_POL); in spi_config()
68 sys_set_bit(SPI_REG(dev, REG_SCKMODE), SF_SCKMODE_PHA); in spi_config()
71 sys_clear_bit(SPI_REG(dev, REG_SCKMODE), SF_SCKMODE_PHA); in spi_config()
83 sys_set_mask(SPI_REG(dev, REG_FMT), SF_FMT_LEN_MASK, fmt_len); in spi_config()
90 sys_set_mask(SPI_REG(dev, REG_FMT), in spi_config()
96 sys_set_bit(SPI_REG(dev, REG_FMT), SF_FMT_ENDIAN); in spi_config()
98 sys_clear_bit(SPI_REG(dev, REG_FMT), SF_FMT_ENDIAN); in spi_config()
106 return !(sys_read32(SPI_REG(dev, REG_TXDATA)) & SF_TXDATA_FULL); in spi_sifive_send_available()
112 sys_write32((uint32_t) frame, SPI_REG(dev, REG_TXDATA)); in spi_sifive_send()
118 uint32_t reg = sys_read32(SPI_REG(dev, REG_RXDATA)); in spi_sifive_recv()
167 sys_write32(SF_CSMODE_OFF, SPI_REG(dev, REG_CSMODE)); in spi_sifive_xfer()
182 sys_clear_bit(SPI_REG(dev, REG_FCTRL), SF_FCTRL_EN); in spi_sifive_init()
228 sys_write32(SF_CSMODE_OFF, SPI_REG(dev, REG_CSMODE)); in spi_sifive_transceive()
237 sys_write32(config->slave, SPI_REG(dev, REG_CSID)); in spi_sifive_transceive()
238 sys_write32(SF_CSMODE_OFF, SPI_REG(dev, REG_CSMODE)); in spi_sifive_transceive()
253 sys_write32(SF_CSMODE_HOLD, SPI_REG(dev, REG_CSMODE)); in spi_sifive_transceive()