45 static bool is_spi_transfer_ongoing(struct spi_pw_data *spi)  in is_spi_transfer_ongoing()  argument
47 	return spi_context_tx_on(&spi->ctx) || spi_context_rx_on(&spi->ctx);  in is_spi_transfer_ongoing()
146 	struct spi_pw_data *spi = dev->data;  in spi_pw_cs_ctrl_enable()  local
149 		if (spi->cs_mode == CS_SW_MODE) {  in spi_pw_cs_ctrl_enable()
151 		} else if (spi->cs_mode == CS_GPIO_MODE) {  in spi_pw_cs_ctrl_enable()
152 			spi_context_cs_control(&spi->ctx, true);  in spi_pw_cs_ctrl_enable()
155 		if (spi->cs_mode == CS_SW_MODE) {  in spi_pw_cs_ctrl_enable()
157 		} else if (spi->cs_mode == CS_GPIO_MODE) {  in spi_pw_cs_ctrl_enable()
158 			spi_context_cs_control(&spi->ctx, false);  in spi_pw_cs_ctrl_enable()
166 	struct spi_pw_data *spi = dev->data;  in spi_pw_cs_ctrl_init()  local
171 	if (spi->cs_output == PW_SPI_CS1_OUTPUT_SELECT) {  in spi_pw_cs_ctrl_init()
182 	if (spi->cs_mode == CS_HW_MODE) {  in spi_pw_cs_ctrl_init()
184 	} else if (spi->cs_mode == CS_SW_MODE) {  in spi_pw_cs_ctrl_init()
186 	} else if (spi->cs_mode == CS_GPIO_MODE) {  in spi_pw_cs_ctrl_init()
206 			       struct spi_pw_data *spi)  in spi_pw_rx_thld_set()  argument
214 	if (spi->ctx.rx_len && spi->ctx.rx_len < spi->fifo_depth) {  in spi_pw_rx_thld_set()
215 		reg_data = spi->ctx.rx_len - 1;  in spi_pw_rx_thld_set()
326 	struct spi_pw_data *spi = dev->data;  in spi_pw_completed()  local
328 	if (!err && (spi_context_tx_on(&spi->ctx) ||  in spi_pw_completed()
329 		     spi_context_rx_on(&spi->ctx))) {  in spi_pw_completed()
352 	spi_context_complete(&spi->ctx, dev, err);  in spi_pw_completed()
410 	struct spi_pw_data *spi = dev->data;  in spi_pw_tx_data()  local
414 	if (spi_context_rx_on(&spi->ctx)) {  in spi_pw_tx_data()
415 		fifo_len = spi->fifo_depth -  in spi_pw_tx_data()
422 		fifo_len = spi->fifo_depth - spi_pw_get_tx_fifo_level(dev);  in spi_pw_tx_data()
426 		if (spi_context_tx_buf_on(&spi->ctx)) {  in spi_pw_tx_data()
427 			switch (spi->dfs) {  in spi_pw_tx_data()
430 						     (spi->ctx.tx_buf));  in spi_pw_tx_data()
434 						     (spi->ctx.tx_buf));  in spi_pw_tx_data()
438 						     (spi->ctx.tx_buf));  in spi_pw_tx_data()
441 		} else if (spi_context_rx_on(&spi->ctx)) {  in spi_pw_tx_data()
442 			if ((int)(spi->ctx.rx_len - spi->fifo_diff) <= 0) {  in spi_pw_tx_data()
447 		} else if (spi_context_tx_on(&spi->ctx)) {  in spi_pw_tx_data()
455 		spi_context_update_tx(&spi->ctx, spi->dfs, 1);  in spi_pw_tx_data()
456 		spi->fifo_diff++;  in spi_pw_tx_data()
460 	if (!spi_context_tx_on(&spi->ctx)) {  in spi_pw_tx_data()
467 	struct spi_pw_data *spi = dev->data;  in spi_pw_rx_data()  local
472 		if (spi_context_rx_buf_on(&spi->ctx)) {  in spi_pw_rx_data()
473 			switch (spi->dfs) {  in spi_pw_rx_data()
476 					      (uint8_t *)spi->ctx.rx_buf);  in spi_pw_rx_data()
480 					      (uint16_t *)spi->ctx.rx_buf);  in spi_pw_rx_data()
484 					      (uint32_t *)spi->ctx.rx_buf);  in spi_pw_rx_data()
489 		spi_context_update_rx(&spi->ctx, spi->dfs, 1);  in spi_pw_rx_data()
490 		spi->fifo_diff--;  in spi_pw_rx_data()
493 	if (!spi->ctx.rx_len && spi->ctx.tx_len < spi->fifo_depth) {  in spi_pw_rx_data()
494 		spi_pw_update_rx_fifo_level(spi->ctx.tx_len - 1, dev);  in spi_pw_rx_data()
495 	} else if (spi_pw_get_rx_fifo_level(dev) >= spi->ctx.rx_len) {  in spi_pw_rx_data()
496 		spi_pw_update_rx_fifo_level(spi->ctx.rx_len - 1, dev);  in spi_pw_rx_data()
545 			    struct spi_pw_data *spi,  in spi_pw_configure()  argument
551 	spi->ctx.config = config;  in spi_pw_configure()
553 	if (!spi_cs_is_gpio(spi->ctx.config)) {  in spi_pw_configure()
554 		if (spi->cs_mode == CS_GPIO_MODE) {  in spi_pw_configure()
556 			spi->cs_mode = CS_HW_MODE;  in spi_pw_configure()
620 	struct spi_pw_data *spi = dev->data;  in transceive()  local
633 	spi_context_lock(&spi->ctx, asynchronous, cb, userdata, config);  in transceive()
636 	err = spi_pw_configure(dev, info, spi, config);  in transceive()
643 	spi->dfs = spi_pw_get_frame_size(config);  in transceive()
644 	spi_context_buffers_setup(&spi->ctx, tx_bufs, rx_bufs,  in transceive()
645 				  spi->dfs);  in transceive()
647 	spi->fifo_diff = 0U;  in transceive()
653 	spi_pw_rx_thld_set(dev, spi);  in transceive()
670 	err = spi_context_wait_for_completion(&spi->ctx);  in transceive()
676 	} while ((!err) && is_spi_transfer_ongoing(spi));  in transceive()
682 	spi_context_release(&spi->ctx, err);  in transceive()
715 	struct spi_pw_data *spi = dev->data;  in spi_pw_release()  local
717 	if (!spi_context_configured(&spi->ctx, config)) {  in spi_pw_release()
721 	spi_context_unlock_unconditionally(&spi->ctx);  in spi_pw_release()
737 static DEVICE_API(spi, pw_spi_api) = {
751 	struct spi_pw_data *spi = dev->data;  in spi_pw_init()  local
802 	if (spi->cs_mode == CS_GPIO_MODE) {  in spi_pw_init()
803 		err = spi_context_cs_configure_all(&spi->ctx);  in spi_pw_init()
810 	spi_context_unlock_unconditionally(&spi->ctx);  in spi_pw_init()