53 	uint32_t cs_ctrl;  in spi_pw_enable_cs_hw_ctrl()  local
55 	cs_ctrl = spi_pw_reg_read(dev, PW_SPI_REG_CS_CTRL);  in spi_pw_enable_cs_hw_ctrl()
56 	cs_ctrl &= PW_SPI_CS_CTRL_HW_MODE;  in spi_pw_enable_cs_hw_ctrl()
57 	spi_pw_reg_write(dev, PW_SPI_REG_CS_CTRL, cs_ctrl);  in spi_pw_enable_cs_hw_ctrl()
62 	uint32_t cs_ctrl;  in spi_pw_cs_sw_ctrl()  local
64 	cs_ctrl = spi_pw_reg_read(dev, PW_SPI_REG_CS_CTRL);  in spi_pw_cs_sw_ctrl()
65 	cs_ctrl &= ~(PW_SPI_CS_CTRL_CS_MASK);  in spi_pw_cs_sw_ctrl()
67 	cs_ctrl |= PW_SPI_CS_CTRL_SW_MODE;  in spi_pw_cs_sw_ctrl()
70 		cs_ctrl &= PW_SPI_CS_LOW;  in spi_pw_cs_sw_ctrl()
72 		cs_ctrl |= PW_SPI_CS_HIGH;  in spi_pw_cs_sw_ctrl()
75 	spi_pw_reg_write(dev, PW_SPI_REG_CS_CTRL, cs_ctrl);  in spi_pw_cs_sw_ctrl()
165 	uint32_t cs_ctrl;  in spi_pw_cs_ctrl_init()  local
169 	cs_ctrl = spi_pw_reg_read(dev, PW_SPI_REG_CS_CTRL);  in spi_pw_cs_ctrl_init()
172 		cs_ctrl &= ~(PW_SPI_CS_CTRL_CS_MASK << PW_SPI_CS_EN_SHIFT);  in spi_pw_cs_ctrl_init()
174 		cs_ctrl |= PW_SPI_CS1_SELECT;  in spi_pw_cs_ctrl_init()
177 		cs_ctrl &= ~(PW_SPI_CS_CTRL_CS_MASK << PW_SPI_CS_EN_SHIFT);  in spi_pw_cs_ctrl_init()
180 	spi_pw_reg_write(dev, PW_SPI_REG_CS_CTRL, cs_ctrl);  in spi_pw_cs_ctrl_init()