Lines Matching refs:spi
191 blk_cfg->dest_address = ll_func_dma_get_reg_addr(cfg->spi, SPI_STM32_DMA_TX); in spi_stm32_dma_tx_load()
250 blk_cfg->source_address = ll_func_dma_get_reg_addr(cfg->spi, SPI_STM32_DMA_RX); in spi_stm32_dma_rx_load()
301 static void spi_stm32_send_next_frame(SPI_TypeDef *spi, in spi_stm32_send_next_frame() argument
311 LL_SPI_TransmitData8(spi, tx_frame); in spi_stm32_send_next_frame()
317 LL_SPI_TransmitData16(spi, tx_frame); in spi_stm32_send_next_frame()
322 static void spi_stm32_read_next_frame(SPI_TypeDef *spi, in spi_stm32_read_next_frame() argument
329 rx_frame = LL_SPI_ReceiveData8(spi); in spi_stm32_read_next_frame()
335 rx_frame = LL_SPI_ReceiveData16(spi); in spi_stm32_read_next_frame()
348 static int spi_stm32_get_err(SPI_TypeDef *spi) in spi_stm32_get_err() argument
350 uint32_t sr = LL_SPI_ReadReg(spi, SR); in spi_stm32_get_err()
357 if (LL_SPI_IsActiveFlag_OVR(spi)) { in spi_stm32_get_err()
358 LL_SPI_ClearFlag_OVR(spi); in spi_stm32_get_err()
367 static void spi_stm32_shift_fifo(SPI_TypeDef *spi, struct spi_stm32_data *data) in spi_stm32_shift_fifo() argument
369 if (ll_func_rx_is_not_empty(spi)) { in spi_stm32_shift_fifo()
370 spi_stm32_read_next_frame(spi, data); in spi_stm32_shift_fifo()
373 if (ll_func_tx_is_not_full(spi)) { in spi_stm32_shift_fifo()
374 spi_stm32_send_next_frame(spi, data); in spi_stm32_shift_fifo()
383 spi_stm32_shift_fifo(cfg->spi, data); in spi_stm32_shift_m()
385 while (!ll_func_tx_is_not_full(cfg->spi)) { in spi_stm32_shift_m()
389 spi_stm32_send_next_frame(cfg->spi, data); in spi_stm32_shift_m()
391 while (!ll_func_rx_is_not_empty(cfg->spi)) { in spi_stm32_shift_m()
395 spi_stm32_read_next_frame(cfg->spi, data); in spi_stm32_shift_m()
400 static void spi_stm32_shift_s(SPI_TypeDef *spi, struct spi_stm32_data *data) in spi_stm32_shift_s() argument
402 if (ll_func_tx_is_not_full(spi) && spi_context_tx_on(&data->ctx)) { in spi_stm32_shift_s()
407 LL_SPI_TransmitData8(spi, tx_frame); in spi_stm32_shift_s()
411 LL_SPI_TransmitData16(spi, tx_frame); in spi_stm32_shift_s()
415 ll_func_disable_int_tx_empty(spi); in spi_stm32_shift_s()
418 if (ll_func_rx_is_not_empty(spi) && in spi_stm32_shift_s()
423 rx_frame = LL_SPI_ReceiveData8(spi); in spi_stm32_shift_s()
427 rx_frame = LL_SPI_ReceiveData16(spi); in spi_stm32_shift_s()
448 spi_stm32_shift_s(cfg->spi, data); in spi_stm32_shift_frames()
451 return spi_stm32_get_err(cfg->spi); in spi_stm32_shift_frames()
476 SPI_TypeDef *spi = cfg->spi; in spi_stm32_complete() local
480 ll_func_disable_int_tx_empty(spi); in spi_stm32_complete()
481 ll_func_disable_int_rx_not_empty(spi); in spi_stm32_complete()
482 ll_func_disable_int_errors(spi); in spi_stm32_complete()
486 LL_SPI_DisableIT_EOT(spi); in spi_stm32_complete()
495 while (ll_func_rx_is_not_empty(spi)) { in spi_stm32_complete()
496 (void) LL_SPI_ReceiveData8(spi); in spi_stm32_complete()
500 if (LL_SPI_GetMode(spi) == LL_SPI_MODE_MASTER) { in spi_stm32_complete()
501 while (ll_func_spi_is_busy(spi)) { in spi_stm32_complete()
509 if (LL_SPI_IsActiveFlag_MODF(spi)) { in spi_stm32_complete()
510 LL_SPI_ClearFlag_MODF(spi); in spi_stm32_complete()
515 LL_SPI_ClearFlag_TXTF(spi); in spi_stm32_complete()
516 LL_SPI_ClearFlag_OVR(spi); in spi_stm32_complete()
517 LL_SPI_ClearFlag_EOT(spi); in spi_stm32_complete()
518 LL_SPI_SetTransferSize(spi, 0); in spi_stm32_complete()
523 ll_func_disable_spi(spi); in spi_stm32_complete()
538 SPI_TypeDef *spi = cfg->spi; in spi_stm32_isr() local
545 if (!LL_SPI_IsEnabled(spi)) { in spi_stm32_isr()
550 err = spi_stm32_get_err(spi); in spi_stm32_isr()
581 SPI_TypeDef *spi = cfg->spi; in spi_stm32_configure() local
598 LL_SPI_SetStandard(spi, LL_SPI_PROTOCOL_TI); in spi_stm32_configure()
606 LL_SPI_SetStandard(spi, LL_SPI_PROTOCOL_MOTOROLA); in spi_stm32_configure()
640 LL_SPI_Disable(spi); in spi_stm32_configure()
641 LL_SPI_SetBaudRatePrescaler(spi, scaler[br - 1]); in spi_stm32_configure()
644 LL_SPI_SetClockPolarity(spi, LL_SPI_POLARITY_HIGH); in spi_stm32_configure()
646 LL_SPI_SetClockPolarity(spi, LL_SPI_POLARITY_LOW); in spi_stm32_configure()
650 LL_SPI_SetClockPhase(spi, LL_SPI_PHASE_2EDGE); in spi_stm32_configure()
652 LL_SPI_SetClockPhase(spi, LL_SPI_PHASE_1EDGE); in spi_stm32_configure()
655 LL_SPI_SetTransferDirection(spi, LL_SPI_FULL_DUPLEX); in spi_stm32_configure()
658 LL_SPI_SetTransferBitOrder(spi, LL_SPI_LSB_FIRST); in spi_stm32_configure()
660 LL_SPI_SetTransferBitOrder(spi, LL_SPI_MSB_FIRST); in spi_stm32_configure()
663 LL_SPI_DisableCRC(spi); in spi_stm32_configure()
668 if (LL_SPI_GetNSSPolarity(spi) == LL_SPI_NSS_POLARITY_LOW) in spi_stm32_configure()
669 LL_SPI_SetInternalSSLevel(spi, LL_SPI_SS_LEVEL_HIGH); in spi_stm32_configure()
672 LL_SPI_SetNSSMode(spi, LL_SPI_NSS_SOFT); in spi_stm32_configure()
675 LL_SPI_SetNSSMode(spi, LL_SPI_NSS_HARD_INPUT); in spi_stm32_configure()
677 LL_SPI_SetNSSMode(spi, LL_SPI_NSS_HARD_OUTPUT); in spi_stm32_configure()
682 LL_SPI_SetMode(spi, LL_SPI_MODE_SLAVE); in spi_stm32_configure()
684 LL_SPI_SetMode(spi, LL_SPI_MODE_MASTER); in spi_stm32_configure()
688 LL_SPI_SetDataWidth(spi, LL_SPI_DATAWIDTH_8BIT); in spi_stm32_configure()
690 LL_SPI_SetDataWidth(spi, LL_SPI_DATAWIDTH_16BIT); in spi_stm32_configure()
694 LL_SPI_SetMasterSSIdleness(spi, cfg->mssi_clocks); in spi_stm32_configure()
695 LL_SPI_SetInterDataIdleness(spi, (cfg->midi_clocks << SPI_CFG2_MIDI_Pos)); in spi_stm32_configure()
699 ll_func_set_fifo_threshold_8bit(spi); in spi_stm32_configure()
723 ll_func_disable_spi(cfg->spi); in spi_stm32_release()
784 SPI_TypeDef *spi = cfg->spi; in transceive() local
821 LL_SPI_SetTransferSize(spi, (uint32_t)total_frames); in transceive()
826 LL_SPI_Enable(spi); in transceive()
834 if (LL_SPI_GetMode(spi) == LL_SPI_MODE_MASTER) { in transceive()
835 LL_SPI_StartMasterTransfer(spi); in transceive()
836 while (!LL_SPI_IsActiveMasterTransfer(spi)) { in transceive()
857 LL_SPI_EnableIT_EOT(spi); in transceive()
861 ll_func_enable_int_errors(spi); in transceive()
864 ll_func_enable_int_rx_not_empty(spi); in transceive()
867 ll_func_enable_int_tx_empty(spi); in transceive()
977 SPI_TypeDef *spi = cfg->spi; in transceive_dma() local
1016 LL_SPI_EnableDMAReq_RX(spi); in transceive_dma()
1017 LL_SPI_EnableDMAReq_TX(spi); in transceive_dma()
1019 LL_SPI_Enable(spi); in transceive_dma()
1020 if (LL_SPI_GetMode(spi) == LL_SPI_MODE_MASTER) { in transceive_dma()
1021 LL_SPI_StartMasterTransfer(spi); in transceive_dma()
1024 LL_SPI_Enable(spi); in transceive_dma()
1051 LL_SPI_EnableDMAReq_RX(spi); in transceive_dma()
1052 LL_SPI_EnableDMAReq_TX(spi); in transceive_dma()
1061 while (LL_SPI_GetTxFIFOLevel(spi) > 0) { in transceive_dma()
1066 WAIT_FOR(ll_func_spi_dma_busy(spi) != 0, in transceive_dma()
1071 while (ll_func_spi_dma_busy(spi) == 0) { in transceive_dma()
1077 LL_SPI_DisableDMAReq_TX(spi); in transceive_dma()
1078 LL_SPI_DisableDMAReq_RX(spi); in transceive_dma()
1091 LL_SPI_Disable(spi); in transceive_dma()
1093 LL_SPI_DisableDMAReq_TX(spi); in transceive_dma()
1094 LL_SPI_DisableDMAReq_RX(spi); in transceive_dma()
1149 static DEVICE_API(spi, api_funcs) = {
1371 .spi = (SPI_TypeDef *) DT_INST_REG_ADDR(id), \