Lines Matching full:32
45 DEFINE_MM_REG_WRITE(ctrlr0, DW_SPI_REG_CTRLR0, 32)
46 DEFINE_MM_REG_READ(ctrlr0, DW_SPI_REG_CTRLR0, 32)
47 DEFINE_MM_REG_WRITE(txftlr, DW_SPI_REG_TXFTLR, 32)
48 DEFINE_MM_REG_WRITE(rxftlr, DW_SPI_REG_RXFTLR, 32)
49 DEFINE_MM_REG_READ(rxftlr, DW_SPI_REG_RXFTLR, 32)
50 DEFINE_MM_REG_READ(txftlr, DW_SPI_REG_TXFTLR, 32)
51 DEFINE_MM_REG_WRITE(dr, DW_SPI_REG_DR, 32)
52 DEFINE_MM_REG_READ(dr, DW_SPI_REG_DR, 32)
53 DEFINE_MM_REG_READ(ssi_comp_version, DW_SPI_REG_SSI_COMP_VERSION, 32)
56 DEFINE_MM_REG_WRITE(ctrlr1, DW_SPI_REG_CTRLR1, 32)
57 DEFINE_MM_REG_READ(ctrlr1, DW_SPI_REG_CTRLR1, 32)
58 DEFINE_MM_REG_WRITE(ser, DW_SPI_REG_SER, 32)