Lines Matching +full:0 +full:- +full:32

1 /* spi_dw_regs.h - Designware SPI driver private definitions */
7  * SPDX-License-Identifier: Apache-2.0
17 #define DW_SPI_REG_CTRLR0		(0x00)
18 #define DW_SPI_REG_CTRLR1		(0x04)
19 #define DW_SPI_REG_SSIENR		(0x08)
20 #define DW_SPI_REG_MWCR			(0x0c)
21 #define DW_SPI_REG_SER			(0x10)
22 #define DW_SPI_REG_BAUDR		(0x14)
23 #define DW_SPI_REG_TXFTLR		(0x18)
24 #define DW_SPI_REG_RXFTLR		(0x1c)
25 #define DW_SPI_REG_TXFLR		(0x20)
26 #define DW_SPI_REG_RXFLR		(0x24)
27 #define DW_SPI_REG_SR			(0x28)
28 #define DW_SPI_REG_IMR			(0x2c)
29 #define DW_SPI_REG_ISR			(0x30)
30 #define DW_SPI_REG_RISR			(0x34)
31 #define DW_SPI_REG_TXOICR		(0x38)
32 #define DW_SPI_REG_RXOICR		(0x3c)
33 #define DW_SPI_REG_RXUICR		(0x40)
34 #define DW_SPI_REG_MSTICR		(0x44)
35 #define DW_SPI_REG_ICR			(0x48)
36 #define DW_SPI_REG_DMACR		(0x4c)
37 #define DW_SPI_REG_DMATDLR		(0x50)
38 #define DW_SPI_REG_DMARDLR		(0x54)
39 #define DW_SPI_REG_IDR			(0x58)
40 #define DW_SPI_REG_SSI_COMP_VERSION	(0x5c)
41 #define DW_SPI_REG_DR			(0x60)
42 #define DW_SPI_REG_RX_SAMPLE_DLY	(0xf0)
45 DEFINE_MM_REG_WRITE(ctrlr0, DW_SPI_REG_CTRLR0, 32)
46 DEFINE_MM_REG_READ(ctrlr0, DW_SPI_REG_CTRLR0, 32)
47 DEFINE_MM_REG_WRITE(txftlr, DW_SPI_REG_TXFTLR, 32)
48 DEFINE_MM_REG_WRITE(rxftlr, DW_SPI_REG_RXFTLR, 32)
49 DEFINE_MM_REG_READ(rxftlr, DW_SPI_REG_RXFTLR, 32)
50 DEFINE_MM_REG_READ(txftlr, DW_SPI_REG_TXFTLR, 32)
51 DEFINE_MM_REG_WRITE(dr, DW_SPI_REG_DR, 32)
52 DEFINE_MM_REG_READ(dr, DW_SPI_REG_DR, 32)
53 DEFINE_MM_REG_READ(ssi_comp_version, DW_SPI_REG_SSI_COMP_VERSION, 32)
56 DEFINE_MM_REG_WRITE(ctrlr1, DW_SPI_REG_CTRLR1, 32)
57 DEFINE_MM_REG_READ(ctrlr1, DW_SPI_REG_CTRLR1, 32)
58 DEFINE_MM_REG_WRITE(ser, DW_SPI_REG_SER, 32)