Lines Matching +full:8 +full:bits

99 	case 8:  in reg_read()
113 	case 8:  in reg_write()
179 /* Common registers settings, bits etc... */
185 #define DW_SPI_CTRLR0_TMOD_SHIFT	(8)
190 #define DW_SPI_CTRLR0_SCPH_BIT		(8)
211 /* 0x38 represents the bits 8, 16 and 32. Knowing that 24 is bits 8 and 16
212  * These are the bits were when you divide by 8, you keep the result as it is.
217 					 (((__bpw) / 8) + 1) :		\
218 					 ((__bpw) / 8))
220 /* SSIENR bits */
223 /* CLK_ENA bits */
226 /* SR bits and values */
231 /* IMR bits (ISR valid as well) */
301 DEFINE_MM_REG_WRITE(imr, DW_SPI_REG_IMR, 8)
302 DEFINE_MM_REG_READ(imr, DW_SPI_REG_IMR, 8)
303 DEFINE_MM_REG_READ(isr, DW_SPI_REG_ISR, 8)