Lines Matching +full:tx +full:- +full:inst +full:- +full:mode

2  * Copyright (c) 2021 Marc Reilly - Creative Product Design
4 * SPDX-License-Identifier: Apache-2.0
35 if (config->operation & SPI_OP_MODE_SLAVE) { in spi_bitbang_configure()
36 LOG_ERR("Slave mode not supported"); in spi_bitbang_configure()
37 return -ENOTSUP; in spi_bitbang_configure()
40 if (config->operation & (SPI_LINES_DUAL | SPI_LINES_QUAD | SPI_LINES_OCTAL)) { in spi_bitbang_configure()
42 return -ENOTSUP; in spi_bitbang_configure()
45 const int bits = SPI_WORD_SIZE_GET(config->operation); in spi_bitbang_configure()
49 return -ENOTSUP; in spi_bitbang_configure()
52 data->bits = bits; in spi_bitbang_configure()
53 data->dfs = ((data->bits - 1) / 8) + 1; in spi_bitbang_configure()
54 if (config->frequency > 0) { in spi_bitbang_configure()
58 data->wait_us = (1000000ul * 2000ul / config->frequency) / 2000ul; in spi_bitbang_configure()
59 data->wait_us /= 2; in spi_bitbang_configure()
61 data->wait_us = 8 / 2; /* 125 kHz */ in spi_bitbang_configure()
64 data->ctx.config = config; in spi_bitbang_configure()
74 const struct spi_bitbang_config *info = dev->config; in spi_bitbang_transceive()
75 struct spi_bitbang_data *data = dev->data; in spi_bitbang_transceive()
76 struct spi_context *ctx = &data->ctx; in spi_bitbang_transceive()
87 if (spi_cfg->operation & SPI_HALF_DUPLEX) { in spi_bitbang_transceive()
88 if (!info->mosi_gpio.port) { in spi_bitbang_transceive()
89 LOG_ERR("No MOSI pin specified in half duplex mode"); in spi_bitbang_transceive()
90 return -EINVAL; in spi_bitbang_transceive()
94 LOG_ERR("Both RX and TX specified in half duplex mode"); in spi_bitbang_transceive()
95 return -EINVAL; in spi_bitbang_transceive()
97 /* TX mode */ in spi_bitbang_transceive()
98 mosi = &info->mosi_gpio; in spi_bitbang_transceive()
100 /* RX mode */ in spi_bitbang_transceive()
102 miso = &info->mosi_gpio; in spi_bitbang_transceive()
105 if (info->mosi_gpio.port) { in spi_bitbang_transceive()
106 mosi = &info->mosi_gpio; in spi_bitbang_transceive()
109 if (info->miso_gpio.port) { in spi_bitbang_transceive()
110 miso = &info->miso_gpio; in spi_bitbang_transceive()
114 if (info->mosi_gpio.port) { in spi_bitbang_transceive()
115 rc = gpio_pin_configure_dt(&info->mosi_gpio, mosi_flags); in spi_bitbang_transceive()
122 spi_context_buffers_setup(ctx, tx_bufs, rx_bufs, data->dfs); in spi_bitbang_transceive()
129 if (SPI_MODE_GET(spi_cfg->operation) & SPI_MODE_CPOL) { in spi_bitbang_transceive()
132 if (SPI_MODE_GET(spi_cfg->operation) & SPI_MODE_CPHA) { in spi_bitbang_transceive()
135 if (SPI_MODE_GET(spi_cfg->operation) & SPI_MODE_LOOP) { in spi_bitbang_transceive()
138 if (spi_cfg->operation & SPI_TRANSFER_LSB) { in spi_bitbang_transceive()
143 gpio_pin_set_dt(&info->clk_gpio, clock_state); in spi_bitbang_transceive()
147 const uint32_t wait_us = data->wait_us; in spi_bitbang_transceive()
152 if (ctx->tx_len) { in spi_bitbang_transceive()
153 switch (data->dfs) { in spi_bitbang_transceive()
155 w = *(uint16_t *)(ctx->tx_buf); in spi_bitbang_transceive()
158 w = *(uint8_t *)(ctx->tx_buf); in spi_bitbang_transceive()
172 while (i < data->bits) { in spi_bitbang_transceive()
173 const int shift = lsb ? i : (data->bits - 1 - i); in spi_bitbang_transceive()
190 gpio_pin_set_dt(&info->clk_gpio, !clock_state); in spi_bitbang_transceive()
199 gpio_pin_set_dt(&info->clk_gpio, clock_state); in spi_bitbang_transceive()
211 switch (data->dfs) { in spi_bitbang_transceive()
213 *(uint16_t *)(ctx->rx_buf) = r; in spi_bitbang_transceive()
216 *(uint8_t *)(ctx->rx_buf) = r; in spi_bitbang_transceive()
223 spi_context_update_tx(ctx, data->dfs, 1); in spi_bitbang_transceive()
224 spi_context_update_rx(ctx, data->dfs, 1); in spi_bitbang_transceive()
242 return -ENOTSUP; in spi_bitbang_transceive_async()
249 struct spi_bitbang_data *data = dev->data; in spi_bitbang_release()
250 struct spi_context *ctx = &data->ctx; in spi_bitbang_release()
269 const struct spi_bitbang_config *config = dev->config; in spi_bitbang_init()
270 struct spi_bitbang_data *data = dev->data; in spi_bitbang_init()
273 if (!gpio_is_ready_dt(&config->clk_gpio)) { in spi_bitbang_init()
275 return -ENODEV; in spi_bitbang_init()
277 rc = gpio_pin_configure_dt(&config->clk_gpio, GPIO_OUTPUT_INACTIVE); in spi_bitbang_init()
283 if (config->mosi_gpio.port != NULL) { in spi_bitbang_init()
284 if (!gpio_is_ready_dt(&config->mosi_gpio)) { in spi_bitbang_init()
286 return -ENODEV; in spi_bitbang_init()
288 rc = gpio_pin_configure_dt(&config->mosi_gpio, in spi_bitbang_init()
296 if (config->miso_gpio.port != NULL) { in spi_bitbang_init()
297 if (!gpio_is_ready_dt(&config->miso_gpio)) { in spi_bitbang_init()
299 return -ENODEV; in spi_bitbang_init()
303 rc = gpio_pin_configure_dt(&config->miso_gpio, GPIO_INPUT); in spi_bitbang_init()
310 rc = spi_context_cs_configure_all(&data->ctx); in spi_bitbang_init()
319 #define SPI_BITBANG_INIT(inst) \ argument
320 static struct spi_bitbang_config spi_bitbang_config_##inst = { \
321 .clk_gpio = GPIO_DT_SPEC_INST_GET(inst, clk_gpios), \
322 .mosi_gpio = GPIO_DT_SPEC_INST_GET_OR(inst, mosi_gpios, {0}), \
323 .miso_gpio = GPIO_DT_SPEC_INST_GET_OR(inst, miso_gpios, {0}), \
326 static struct spi_bitbang_data spi_bitbang_data_##inst = { \
327 SPI_CONTEXT_INIT_LOCK(spi_bitbang_data_##inst, ctx), \
328 SPI_CONTEXT_INIT_SYNC(spi_bitbang_data_##inst, ctx), \
329 SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(inst), ctx) \
332 SPI_DEVICE_DT_INST_DEFINE(inst, \
335 &spi_bitbang_data_##inst, \
336 &spi_bitbang_config_##inst, \