Lines Matching +full:host +full:- +full:slave
7 * PCH provides SMBus 2.0 - compliant Host Controller.
9 * SPDX-License-Identifier: Apache-2.0
17 /* Host Configuration (HCFG) - Offset 40h, 8 bits */
23 /* Host Status Register Address (HSTS) */
25 #define PCH_SMBUS_HSTS_HOST_BUSY BIT(0) /* Host Busy */
38 /* Host Control Register (HCTL) */
39 #define PCH_SMBUS_HCTL 0x02 /* Host Control */
61 /* Host Command Register (HCMD) */
64 /* Transmit Slave Address Register (TSA) */
69 /* Set 7-bit address */
81 /* Host Block Data (HBD) */
82 #define PCH_SMBUS_HBD 0x07 /* Host block data */
87 /* Receive Slave Address Register (RSA) */
88 #define PCH_SMBUS_RSA 0x09 /* Receive slave addr */
90 /* Slave Data Register (SD) (16 bits) */
91 #define PCH_SMBUS_SD 0x0a /* Slave data */
100 #define PCH_SMBUS_AUXC_EN_32BUF BIT(1) /* Enable 32-byte buf */
111 /* Slave Status Register (SSTS) */
112 #define PCH_SMBUS_SSTS 0x10 /* Slave Status */
113 #define PCH_SMBUS_SSTS_HNS BIT(0) /* Host Notify Status */
115 /* Slave Command Register (SCMD) */
116 #define PCH_SMBUS_SCMD 0x11 /* Slave Command */
117 #define PCH_SMBUS_SCMD_HNI_EN BIT(0) /* Host Notify INT En */
118 #define PCH_SMBUS_SCMD_HNW_EN BIT(1) /* Host Notify Wake */
136 reg & PCH_SMBUS_HSTS_HOST_BUSY ? "[Host Busy] " : "", \