Lines Matching +full:7 +full:- +full:pin
7 * PCH provides SMBus 2.0 - compliant Host Controller.
9 * SPDX-License-Identifier: Apache-2.0
17 /* Host Configuration (HCFG) - Offset 40h, 8 bits */
32 #define PCH_SMBUS_HSTS_BYTE_DONE BIT(7) /* Byte Done */
51 #define PCH_SMBUS_HCTL_CMD_BLOCK_PROC (7 << 2) /* Block Process cmd */
59 #define PCH_SMBUS_HCTL_PEC_EN BIT(7) /* Enable PEC */
67 #define PCH_SMBUS_TSA_ADDR_MASK GENMASK(7, 1) /* Address mask */
69 /* Set 7-bit address */
70 #define PCH_SMBUS_TSA_ADDR_SET(addr) (((addr) & BIT_MASK(7)) << 1)
73 #define PCH_SMBUS_TSA_ADDR_GET(reg) ((reg >> 1) & BIT_MASK(7))
100 #define PCH_SMBUS_AUXC_EN_32BUF BIT(1) /* Enable 32-byte buf */
102 /* SMLink Pin Control Register (SMLC) */
103 #define PCH_SMBUS_SMLC 0x0e /* SMLink pin control */
105 /* SMBus Pin control Register (SMBC) */
106 #define PCH_SMBUS_SMBC 0x0f /* SMBus pin control */
107 #define PCH_SMBUS_SMBC_CLK_CUR_STS BIT(0) /* SMBCLK pin status */
108 #define PCH_SMBUS_SMBC_DATA_CUR_STS BIT(1) /* SMBDATA pin status */
109 #define PCH_SMBUS_SMBC_CLK_CTL BIT(2) /* SMBCLK pin CTL */