56 	const struct gd32_usart_config *const cfg = dev->config;  in usart_gd32_init()  local
62 	ret = pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT);  in usart_gd32_init()
71 	switch (cfg->parity) {  in usart_gd32_init()
89 			       (clock_control_subsys_t)&cfg->clkid);  in usart_gd32_init()
91 	(void)reset_line_toggle_dt(&cfg->reset);  in usart_gd32_init()
93 	usart_baudrate_set(cfg->reg, data->baud_rate);  in usart_gd32_init()
94 	usart_parity_config(cfg->reg, parity);  in usart_gd32_init()
95 	usart_word_length_set(cfg->reg, word_length);  in usart_gd32_init()
97 	usart_stop_bit_set(cfg->reg, USART_STB_1BIT);  in usart_gd32_init()
98 	usart_receive_config(cfg->reg, USART_RECEIVE_ENABLE);  in usart_gd32_init()
99 	usart_transmit_config(cfg->reg, USART_TRANSMIT_ENABLE);  in usart_gd32_init()
100 	usart_enable(cfg->reg);  in usart_gd32_init()
103 	cfg->irq_config_func(dev);  in usart_gd32_init()
111 	const struct gd32_usart_config *const cfg = dev->config;  in usart_gd32_poll_in()  local
114 	status = usart_flag_get(cfg->reg, USART_FLAG_RBNE);  in usart_gd32_poll_in()
120 	*c = usart_data_receive(cfg->reg);  in usart_gd32_poll_in()
127 	const struct gd32_usart_config *const cfg = dev->config;  in usart_gd32_poll_out()  local
129 	usart_data_transmit(cfg->reg, c);  in usart_gd32_poll_out()
131 	while (usart_flag_get(cfg->reg, USART_FLAG_TBE) == RESET) {  in usart_gd32_poll_out()
138 	const struct gd32_usart_config *const cfg = dev->config;  in usart_gd32_err_check()  local
139 	uint32_t status = USART_STAT(cfg->reg);  in usart_gd32_err_check()
143 		usart_flag_clear(cfg->reg, USART_FLAG_ORERR);  in usart_gd32_err_check()
149 		usart_flag_clear(cfg->reg, USART_FLAG_PERR);  in usart_gd32_err_check()
155 		usart_flag_clear(cfg->reg, USART_FLAG_FERR);  in usart_gd32_err_check()
160 	usart_flag_clear(cfg->reg, USART_FLAG_NERR);  in usart_gd32_err_check()
169 	const struct gd32_usart_config *const cfg = dev->config;  in usart_gd32_fifo_fill()  local
173 	       usart_flag_get(cfg->reg, USART_FLAG_TBE)) {  in usart_gd32_fifo_fill()
174 		usart_data_transmit(cfg->reg, tx_data[num_tx++]);  in usart_gd32_fifo_fill()
183 	const struct gd32_usart_config *const cfg = dev->config;  in usart_gd32_fifo_read()  local
187 	       usart_flag_get(cfg->reg, USART_FLAG_RBNE)) {  in usart_gd32_fifo_read()
188 		rx_data[num_rx++] = usart_data_receive(cfg->reg);  in usart_gd32_fifo_read()
196 	const struct gd32_usart_config *const cfg = dev->config;  in usart_gd32_irq_tx_enable()  local
198 	usart_interrupt_enable(cfg->reg, USART_INT_TC);  in usart_gd32_irq_tx_enable()
203 	const struct gd32_usart_config *const cfg = dev->config;  in usart_gd32_irq_tx_disable()  local
205 	usart_interrupt_disable(cfg->reg, USART_INT_TC);  in usart_gd32_irq_tx_disable()
210 	const struct gd32_usart_config *const cfg = dev->config;  in usart_gd32_irq_tx_ready()  local
212 	return usart_flag_get(cfg->reg, USART_FLAG_TBE) &&  in usart_gd32_irq_tx_ready()
213 	       usart_interrupt_flag_get(cfg->reg, USART_INT_FLAG_TC);  in usart_gd32_irq_tx_ready()
218 	const struct gd32_usart_config *const cfg = dev->config;  in usart_gd32_irq_tx_complete()  local
220 	return usart_flag_get(cfg->reg, USART_FLAG_TC);  in usart_gd32_irq_tx_complete()
225 	const struct gd32_usart_config *const cfg = dev->config;  in usart_gd32_irq_rx_enable()  local
227 	usart_interrupt_enable(cfg->reg, USART_INT_RBNE);  in usart_gd32_irq_rx_enable()
232 	const struct gd32_usart_config *const cfg = dev->config;  in usart_gd32_irq_rx_disable()  local
234 	usart_interrupt_disable(cfg->reg, USART_INT_RBNE);  in usart_gd32_irq_rx_disable()
239 	const struct gd32_usart_config *const cfg = dev->config;  in usart_gd32_irq_rx_ready()  local
241 	return usart_flag_get(cfg->reg, USART_FLAG_RBNE);  in usart_gd32_irq_rx_ready()
246 	const struct gd32_usart_config *const cfg = dev->config;  in usart_gd32_irq_err_enable()  local
248 	usart_interrupt_enable(cfg->reg, USART_INT_ERR);  in usart_gd32_irq_err_enable()
249 	usart_interrupt_enable(cfg->reg, USART_INT_PERR);  in usart_gd32_irq_err_enable()
254 	const struct gd32_usart_config *const cfg = dev->config;  in usart_gd32_irq_err_disable()  local
256 	usart_interrupt_disable(cfg->reg, USART_INT_ERR);  in usart_gd32_irq_err_disable()
257 	usart_interrupt_disable(cfg->reg, USART_INT_PERR);  in usart_gd32_irq_err_disable()
262 	const struct gd32_usart_config *const cfg = dev->config;  in usart_gd32_irq_is_pending()  local
264 	return ((usart_flag_get(cfg->reg, USART_FLAG_RBNE) &&  in usart_gd32_irq_is_pending()
265 		 usart_interrupt_flag_get(cfg->reg, USART_INT_FLAG_RBNE)) ||  in usart_gd32_irq_is_pending()
266 		(usart_flag_get(cfg->reg, USART_FLAG_TC) &&  in usart_gd32_irq_is_pending()
267 		 usart_interrupt_flag_get(cfg->reg, USART_INT_FLAG_TC)));  in usart_gd32_irq_is_pending()