233 	uintptr_t reg_base = DEVICE_MMIO_GET(dev);  in set_baudrate()
291 	uintptr_t reg_base = DEVICE_MMIO_GET(dev);  in uart_xlnx_ps_init()
345 	uintptr_t reg_base = DEVICE_MMIO_GET(dev);  in uart_xlnx_ps_poll_in()
372 	uintptr_t reg_base = DEVICE_MMIO_GET(dev);  in uart_xlnx_ps_poll_out()
604 	uintptr_t reg_base   = DEVICE_MMIO_GET(dev);  in uart_xlnx_ps_configure()
809 	uintptr_t reg_base = DEVICE_MMIO_GET(dev);  in uart_xlnx_ps_config_get()
845 	uintptr_t reg_base = DEVICE_MMIO_GET(dev);  in uart_xlnx_ps_fifo_fill()
871 	uintptr_t reg_base = DEVICE_MMIO_GET(dev);  in uart_xlnx_ps_fifo_read()
892 	uintptr_t reg_base = DEVICE_MMIO_GET(dev);  in uart_xlnx_ps_irq_tx_enable()
906 	uintptr_t reg_base = DEVICE_MMIO_GET(dev);  in uart_xlnx_ps_irq_tx_disable()
922 	uintptr_t reg_base = DEVICE_MMIO_GET(dev);  in uart_xlnx_ps_irq_tx_ready()
941 	uintptr_t reg_base = DEVICE_MMIO_GET(dev);  in uart_xlnx_ps_irq_tx_complete()
958 	uintptr_t reg_base = DEVICE_MMIO_GET(dev);  in uart_xlnx_ps_irq_rx_enable()
970 	uintptr_t reg_base = DEVICE_MMIO_GET(dev);  in uart_xlnx_ps_irq_rx_disable()
984 	uintptr_t reg_base = DEVICE_MMIO_GET(dev);  in uart_xlnx_ps_irq_rx_ready()
1002 	uintptr_t reg_base = DEVICE_MMIO_GET(dev);  in uart_xlnx_ps_irq_err_enable()
1022 	uintptr_t reg_base = DEVICE_MMIO_GET(dev);  in uart_xlnx_ps_irq_err_disable()
1042 	uintptr_t reg_base = DEVICE_MMIO_GET(dev);  in uart_xlnx_ps_irq_is_pending()