1 /* uart_xlnx_ps.c - Xilinx Zynq family serial driver */
6  * SPDX-License-Identifier: Apache-2.0
19  * - the following macro for the number of bytes between register addresses:
42  * Comp. Xilinx Zynq-7000 Technical Reference Manual (ug585), chap. B.33
46 #define XUARTPS_CR_OFFSET	0x0000U  /**< Control Register [8:0] */
55 #define XUARTPS_MODEMCR_OFFSET	0x0024U  /**< Modem Control [5:0] */
64 /* Control Register Bits Definition */
120 /* Modem Control Register Bits Definition */
121 #define XUARTPS_MODEMCR_FCM_RTS_CTS	0x00000020 /**< RTS/CTS hardware flow control. */
122 #define XUARTPS_MODEMCR_FCM_NONE	0x00000000 /**< No hardware flow control. */
123 #define XUARTPS_MODEMCR_FCM_MASK	0x00000020 /**< Hardware flow control mask. */
176  * of the UART are modified at run-time.
185 	/* Set control register bits [5]: TX_DIS and [3]: RX_DIS */  in xlnx_ps_disable_uart()
200  * of the UART are being modified at run-time.
209 	/* Set control register bits [4]: TX_EN and [2]: RX_EN */  in xlnx_ps_enable_uart()
222  * registers is described in the Zynq-7000 TRM, chapter 19.2.3 'Baud Rate
230 	const struct uart_xlnx_ps_dev_config *dev_cfg = dev->config;  in set_baudrate()
231 	uint32_t baud = dev_cfg->baud_rate;  in set_baudrate()
232 	uint32_t clk_freq = dev_cfg->sys_clk_freq;  in set_baudrate()
253 				bauderr = baud - tmpbaud;  in set_baudrate()
255 				bauderr = tmpbaud - baud;  in set_baudrate()
264 		 * -> This function is always called from a context in which  in set_baudrate()
284 	const struct uart_xlnx_ps_dev_config *dev_cfg = dev->config;  in uart_xlnx_ps_init()
297 	err = pinctrl_apply_state(dev_cfg->pincfg, PINCTRL_STATE_DEFAULT);  in uart_xlnx_ps_init()
318 	set_baudrate(dev, dev_cfg->baud_rate);  in uart_xlnx_ps_init()
326 	dev_cfg->irq_config_func(dev);  in uart_xlnx_ps_init()
341  * @return 0 if a character arrived, -1 if the input buffer if empty.
352 		return -1;  in uart_xlnx_ps_poll_in()
362  * If the hardware flow control is enabled then the handshake signal CTS has to
543  * @brief Converts a flow control enum value to a Modem Control
547  * framework for the configuration of the UART's flow control
548  * setting into a bit mask within the Modem Control Register.
550  * It is assumed that the Modem Control Register contents that are
554  * @param modemcr_reg Pointer to the Modem Control Register contents
555  *                    to which the flow control configuration shall
560  *         flow control configuration being provided by the caller.
567 	 * Translate the new flow control configuration to the modem  in uart_xlnx_ps_cfg2ll_hwctrl()
568 	 * control register's bit [5] (FCM):  in uart_xlnx_ps_cfg2ll_hwctrl()
569 	 *  0b : no flow control  in uart_xlnx_ps_cfg2ll_hwctrl()
578 		/* Only no flow control or RTS/CTS is supported. */  in uart_xlnx_ps_cfg2ll_hwctrl()
587  * @brief Configures the UART device at run-time.
589  * Configures the UART device at run-time according to the
602 	(struct uart_xlnx_ps_dev_config *)dev->config;  in uart_xlnx_ps_configure()
608 	/* Read the current mode register & modem control register values */  in uart_xlnx_ps_configure()
612 	/* Mask out all items that might be re-configured */  in uart_xlnx_ps_configure()
619 	if ((!uart_xlnx_ps_cfg2ll_parity(&mode_reg, cfg->parity)) ||  in uart_xlnx_ps_configure()
620 		(!uart_xlnx_ps_cfg2ll_stopbits(&mode_reg, cfg->stop_bits)) ||  in uart_xlnx_ps_configure()
621 		(!uart_xlnx_ps_cfg2ll_databits(&mode_reg, cfg->data_bits)) ||  in uart_xlnx_ps_configure()
622 		(!uart_xlnx_ps_cfg2ll_hwctrl(&modemcr_reg, cfg->flow_ctrl))) {  in uart_xlnx_ps_configure()
623 		return -ENOTSUP;  in uart_xlnx_ps_configure()
630 	set_baudrate(dev, cfg->baudrate);  in uart_xlnx_ps_configure()
631 	dev_cfg->baud_rate = cfg->baudrate;  in uart_xlnx_ps_configure()
633 	/* Write the two control registers */  in uart_xlnx_ps_configure()
637 	/* Re-enable the controller */  in uart_xlnx_ps_configure()
652  * @param mode_reg The current Mode Register contents from which the
655  * @return The current parity setting mapped to the UART driver API's
662 	 * Obtain the current parity configuration from the mode register's  in uart_xlnx_ps_ll2cfg_parity()
664 	 *  000b : even -> reset value  in uart_xlnx_ps_ll2cfg_parity()
694  * @param mode_reg The current Mode Register contents from which the
697  * @return The current stop bit setting mapped to the UART driver API's
704 	 * Obtain the current stop bit configuration from the mode register's  in uart_xlnx_ps_ll2cfg_stopbits()
706 	 *  00b : 1 stop bit -> reset value  in uart_xlnx_ps_ll2cfg_stopbits()
731  * @param mode_reg The current Mode Register contents from which the
734  * @return The current data bit setting mapped to the UART driver API's
741 	 * Obtain the current data bit configuration from the mode register's  in uart_xlnx_ps_ll2cfg_databits()
743 	 *  0xb : 8 data bits -> reset value  in uart_xlnx_ps_ll2cfg_databits()
760  * @brief Converts a Modem Control Register bit mask to a flow control
763  * Converts a bit mask representing the UART's flow control setting within
764  * the UART's Modem Control Register into a value of an enumeration type
767  * @param modemcr_reg The current Modem Control Register contents from
770  * @return The current flow control setting mapped to the UART driver API's
777 	 * Obtain the current flow control configuration from the modem  in uart_xlnx_ps_ll2cfg_hwctrl()
778 	 * control register's bit [5] (FCM):  in uart_xlnx_ps_ll2cfg_hwctrl()
779 	 *  0b : no flow control -> reset value  in uart_xlnx_ps_ll2cfg_hwctrl()
793  * @brief Returns the current configuration of the UART at run-time.
795  * Returns the current configuration of the UART at run-time by obtaining
796  * the current configuration from the UART's Mode and Modem Control Registers
800  * @param cfg Pointer to the data structure to which the current configuration
808 	const struct uart_xlnx_ps_dev_config *dev_cfg = dev->config;  in uart_xlnx_ps_config_get()
812 	 * Read the Mode & Modem control registers - they contain  in uart_xlnx_ps_config_get()
813 	 * the current data / stop bit and parity settings (Mode  in uart_xlnx_ps_config_get()
814 	 * Register) and the current flow control setting (Modem  in uart_xlnx_ps_config_get()
815 	 * Control register).  in uart_xlnx_ps_config_get()
820 	cfg->baudrate  = dev_cfg->baud_rate;  in uart_xlnx_ps_config_get()
821 	cfg->parity    = uart_xlnx_ps_ll2cfg_parity(mode_reg);  in uart_xlnx_ps_config_get()
822 	cfg->stop_bits = uart_xlnx_ps_ll2cfg_stopbits(mode_reg);  in uart_xlnx_ps_config_get()
823 	cfg->data_bits = uart_xlnx_ps_ll2cfg_databits(mode_reg);  in uart_xlnx_ps_config_get()
824 	cfg->flow_ctrl = uart_xlnx_ps_ll2cfg_hwctrl(modemcr_reg);  in uart_xlnx_ps_config_get()
849 	while (size--) {  in uart_xlnx_ps_fifo_fill()
1076 	struct uart_xlnx_ps_dev_data_t *dev_data = dev->data;  in uart_xlnx_ps_irq_callback_set()
1078 	dev_data->user_cb = cb;  in uart_xlnx_ps_irq_callback_set()
1079 	dev_data->user_data = cb_data;  in uart_xlnx_ps_irq_callback_set()
1091 	const struct uart_xlnx_ps_dev_data_t *data = dev->data;  in uart_xlnx_ps_isr()
1093 	if (data->user_cb) {  in uart_xlnx_ps_isr()
1094 		data->user_cb(dev, data->user_data);  in uart_xlnx_ps_isr()