Lines Matching refs:index
2221 #define UART_DMA_CHANNEL_INIT(index, dir, dir_cap, src_dev, dest_dev) \ argument
2222 .dma_dev = DEVICE_DT_GET(STM32_DMA_CTLR(index, dir)), \
2223 .dma_channel = DT_INST_DMAS_CELL_BY_NAME(index, dir, channel), \
2225 .dma_slot = STM32_DMA_SLOT(index, dir, slot),\
2227 STM32_DMA_CHANNEL_CONFIG(index, dir)),\
2229 STM32_DMA_CHANNEL_CONFIG(index, dir)), \
2231 STM32_DMA_CHANNEL_CONFIG(index, dir)),\
2233 STM32_DMA_CHANNEL_CONFIG(index, dir)),\
2240 STM32_DMA_CHANNEL_CONFIG(index, dir)), \
2242 STM32_DMA_CHANNEL_CONFIG(index, dir)), \
2244 STM32_DMA_FEATURES(index, dir)), \
2250 #define STM32_UART_IRQ_HANDLER_DECL(index) \ argument
2251 static void uart_stm32_irq_config_func_##index(const struct device *dev);
2252 #define STM32_UART_IRQ_HANDLER(index) \ argument
2253 static void uart_stm32_irq_config_func_##index(const struct device *dev) \
2255 IRQ_CONNECT(DT_INST_IRQN(index), \
2256 DT_INST_IRQ(index, priority), \
2257 uart_stm32_isr, DEVICE_DT_INST_GET(index), \
2259 irq_enable(DT_INST_IRQN(index)); \
2262 #define STM32_UART_IRQ_HANDLER_DECL(index) /* Not used */ argument
2263 #define STM32_UART_IRQ_HANDLER(index) /* Not used */ argument
2268 #define STM32_UART_IRQ_HANDLER_FUNC(index) \ argument
2269 .irq_config_func = uart_stm32_irq_config_func_##index,
2271 #define STM32_UART_IRQ_HANDLER_FUNC(index) /* Not used */ argument
2275 #define UART_DMA_CHANNEL(index, dir, DIR, src, dest) \ argument
2277 COND_CODE_1(DT_INST_DMAS_HAS_NAME(index, dir), \
2278 (UART_DMA_CHANNEL_INIT(index, dir, DIR, src, dest)), \
2283 #define UART_DMA_CHANNEL(index, dir, DIR, src, dest) argument
2287 #define STM32_UART_PM_WAKEUP(index) \ argument
2288 .wakeup_source = DT_INST_PROP(index, wakeup_source), \
2289 .wakeup_line = COND_CODE_1(DT_INST_NODE_HAS_PROP(index, wakeup_line), \
2290 (DT_INST_PROP(index, wakeup_line)), \
2293 #define STM32_UART_PM_WAKEUP(index) /* Not used */ argument
2300 #define STM32_UART_CHECK_DT_PARITY(index) \ argument
2302 !(DT_INST_ENUM_IDX_OR(index, parity, STM32_UART_DEFAULT_PARITY) \
2304 DT_INST_ENUM_IDX_OR(index, parity, STM32_UART_DEFAULT_PARITY) \
2306 "Node " DT_NODE_PATH(DT_DRV_INST(index)) \
2309 !(DT_INST_ENUM_IDX_OR(index, parity, STM32_UART_DEFAULT_PARITY) \
2311 DT_INST_ENUM_IDX_OR(index, data_bits, \
2314 "Node " DT_NODE_PATH(DT_DRV_INST(index)) \
2322 #define STM32_UART_CHECK_DT_DATA_BITS(index) \ argument
2324 !(DT_INST_ENUM_IDX_OR(index, data_bits, \
2327 (DT_INST_ENUM_IDX_OR(index, data_bits, \
2330 DT_INST_ENUM_IDX_OR(index, parity, \
2333 "Node " DT_NODE_PATH(DT_DRV_INST(index)) \
2336 #define STM32_UART_CHECK_DT_DATA_BITS(index) \ argument
2338 !(DT_INST_ENUM_IDX_OR(index, data_bits, \
2341 DT_INST_ENUM_IDX_OR(index, data_bits, \
2344 (DT_INST_ENUM_IDX_OR(index, data_bits, \
2347 DT_INST_ENUM_IDX_OR(index, parity, \
2350 "Node " DT_NODE_PATH(DT_DRV_INST(index)) \
2359 #define STM32_UART_CHECK_DT_STOP_BITS_0_5(index) \ argument
2361 !(DT_INST_ENUM_IDX_OR(index, stop_bits, \
2364 "Node " DT_NODE_PATH(DT_DRV_INST(index)) \
2368 #define STM32_UART_CHECK_DT_STOP_BITS_0_5(index) \ argument
2371 DT_INST_ENUM_IDX_OR(index, stop_bits, \
2374 "Node " DT_NODE_PATH(DT_DRV_INST(index)) \
2383 #define STM32_UART_CHECK_DT_STOP_BITS_1_5(index) \ argument
2385 DT_INST_ENUM_IDX_OR(index, stop_bits, \
2388 "Node " DT_NODE_PATH(DT_DRV_INST(index)) \
2392 #define STM32_UART_CHECK_DT_STOP_BITS_1_5(index) \ argument
2395 DT_INST_ENUM_IDX_OR(index, stop_bits, \
2398 "Node " DT_NODE_PATH(DT_DRV_INST(index)) \
2402 #define STM32_UART_INIT(index) \ argument
2403 STM32_UART_IRQ_HANDLER_DECL(index) \
2405 PINCTRL_DT_INST_DEFINE(index); \
2407 static const struct stm32_pclken pclken_##index[] = \
2408 STM32_DT_INST_CLOCKS(index);\
2410 static struct uart_config uart_cfg_##index = { \
2411 .baudrate = DT_INST_PROP_OR(index, current_speed, \
2413 .parity = DT_INST_ENUM_IDX_OR(index, parity, \
2415 .stop_bits = DT_INST_ENUM_IDX_OR(index, stop_bits, \
2417 .data_bits = DT_INST_ENUM_IDX_OR(index, data_bits, \
2419 .flow_ctrl = DT_INST_PROP(index, hw_flow_control) \
2424 static const struct uart_stm32_config uart_stm32_cfg_##index = { \
2425 .usart = (USART_TypeDef *)DT_INST_REG_ADDR(index), \
2426 .reset = RESET_DT_SPEC_GET(DT_DRV_INST(index)), \
2427 .pclken = pclken_##index, \
2428 .pclk_len = DT_INST_NUM_CLOCKS(index), \
2429 .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(index), \
2430 .single_wire = DT_INST_PROP(index, single_wire), \
2431 .tx_rx_swap = DT_INST_PROP(index, tx_rx_swap), \
2432 .rx_invert = DT_INST_PROP(index, rx_invert), \
2433 .tx_invert = DT_INST_PROP(index, tx_invert), \
2434 .de_enable = DT_INST_PROP(index, de_enable), \
2435 .de_assert_time = DT_INST_PROP(index, de_assert_time), \
2436 .de_deassert_time = DT_INST_PROP(index, de_deassert_time), \
2437 .de_invert = DT_INST_PROP(index, de_invert), \
2438 .fifo_enable = DT_INST_PROP(index, fifo_enable), \
2439 STM32_UART_IRQ_HANDLER_FUNC(index) \
2440 STM32_UART_PM_WAKEUP(index) \
2443 static struct uart_stm32_data uart_stm32_data_##index = { \
2444 .uart_cfg = &uart_cfg_##index, \
2445 UART_DMA_CHANNEL(index, rx, RX, PERIPHERAL, MEMORY) \
2446 UART_DMA_CHANNEL(index, tx, TX, MEMORY, PERIPHERAL) \
2449 PM_DEVICE_DT_INST_DEFINE(index, uart_stm32_pm_action); \
2451 DEVICE_DT_INST_DEFINE(index, \
2453 PM_DEVICE_DT_INST_GET(index), \
2454 &uart_stm32_data_##index, &uart_stm32_cfg_##index, \
2458 STM32_UART_IRQ_HANDLER(index) \
2460 STM32_UART_CHECK_DT_PARITY(index) \
2461 STM32_UART_CHECK_DT_DATA_BITS(index) \
2462 STM32_UART_CHECK_DT_STOP_BITS_0_5(index) \
2463 STM32_UART_CHECK_DT_STOP_BITS_1_5(index)