Lines Matching refs:eusart

19 	EUSART_TypeDef *eusart;  member
40 if (EUSART_StatusGet(config->eusart) & EUSART_STATUS_RXFL) { in uart_silabs_eusart_poll_in()
41 *c = EUSART_Rx(config->eusart); in uart_silabs_eusart_poll_in()
55 EUSART_Tx(config->eusart, c); in uart_silabs_eusart_poll_out()
61 uint32_t flags = EUSART_IntGet(config->eusart); in uart_silabs_eusart_err_check()
76 EUSART_IntClear(config->eusart, EUSART_IF_RXOF | EUSART_IF_PERR | EUSART_IF_FERR); in uart_silabs_eusart_err_check()
90 (EUSART_StatusGet(config->eusart) & EUSART_STATUS_TXFL)) { in uart_silabs_eusart_fifo_fill()
92 config->eusart->TXDATA = (uint32_t)tx_data[num_tx++]; in uart_silabs_eusart_fifo_fill()
95 if (!(EUSART_StatusGet(config->eusart) & EUSART_STATUS_TXFL)) { in uart_silabs_eusart_fifo_fill()
96 EUSART_IntClear(config->eusart, EUSART_IF_TXFL); in uart_silabs_eusart_fifo_fill()
109 (EUSART_StatusGet(config->eusart) & EUSART_STATUS_RXFL)) { in uart_silabs_eusart_fifo_read()
110 rx_data[num_rx++] = (uint8_t)config->eusart->RXDATA; in uart_silabs_eusart_fifo_read()
113 if (!(EUSART_StatusGet(config->eusart) & EUSART_STATUS_RXFL)) { in uart_silabs_eusart_fifo_read()
114 EUSART_IntClear(config->eusart, EUSART_IF_RXFL); in uart_silabs_eusart_fifo_read()
124 EUSART_IntClear(config->eusart, EUSART_IEN_TXFL | EUSART_IEN_TXC); in uart_silabs_eusart_irq_tx_enable()
125 EUSART_IntEnable(config->eusart, EUSART_IEN_TXFL | EUSART_IEN_TXC); in uart_silabs_eusart_irq_tx_enable()
132 EUSART_IntDisable(config->eusart, EUSART_IEN_TXFL | EUSART_IEN_TXC); in uart_silabs_eusart_irq_tx_disable()
133 EUSART_IntClear(config->eusart, EUSART_IEN_TXFL | EUSART_IEN_TXC); in uart_silabs_eusart_irq_tx_disable()
139 uint32_t flags = EUSART_IntGet(config->eusart); in uart_silabs_eusart_irq_tx_complete()
141 EUSART_IntClear(config->eusart, EUSART_IF_TXC); in uart_silabs_eusart_irq_tx_complete()
150 return (config->eusart->IEN & EUSART_IEN_TXFL) in uart_silabs_eusart_irq_tx_ready()
151 && (EUSART_IntGet(config->eusart) & EUSART_IF_TXFL); in uart_silabs_eusart_irq_tx_ready()
158 EUSART_IntClear(config->eusart, EUSART_IEN_RXFL); in uart_silabs_eusart_irq_rx_enable()
159 EUSART_IntEnable(config->eusart, EUSART_IEN_RXFL); in uart_silabs_eusart_irq_rx_enable()
166 EUSART_IntDisable(config->eusart, EUSART_IEN_RXFL); in uart_silabs_eusart_irq_rx_disable()
167 EUSART_IntClear(config->eusart, EUSART_IEN_RXFL); in uart_silabs_eusart_irq_rx_disable()
174 return (config->eusart->IEN & EUSART_IEN_RXFL) in uart_silabs_eusart_irq_rx_ready()
175 && (EUSART_IntGet(config->eusart) & EUSART_IF_RXFL); in uart_silabs_eusart_irq_rx_ready()
182 EUSART_IntClear(config->eusart, EUSART_IF_RXOF | EUSART_IF_PERR | EUSART_IF_FERR); in uart_silabs_eusart_irq_err_enable()
183 EUSART_IntEnable(config->eusart, EUSART_IF_RXOF | EUSART_IF_PERR | EUSART_IF_FERR); in uart_silabs_eusart_irq_err_enable()
190 EUSART_IntDisable(config->eusart, EUSART_IF_RXOF | EUSART_IF_PERR | EUSART_IF_FERR); in uart_silabs_eusart_irq_err_disable()
191 EUSART_IntClear(config->eusart, EUSART_IF_RXOF | EUSART_IF_PERR | EUSART_IF_FERR); in uart_silabs_eusart_irq_err_disable()
408 EUSART_UartInitHf(config->eusart, &eusartInit); in uart_silabs_eusart_init()
426 while (!(EUSART_StatusGet(config->eusart) & EUSART_STATUS_TXIDLE)) { in uart_silabs_eusart_pm_action()
491 .eusart = (EUSART_TypeDef *)DT_INST_REG_ADDR(idx), \