Lines Matching +full:8 +full:bit

34 #define RDR_MASK_RDAT GENMASK(8, 0)
36 #define CCR0_MASK_RE    BIT(0)
37 #define CCR0_MASK_TE    BIT(4)
38 #define CCR0_MASK_DCME  BIT(9)
39 #define CCR0_MASK_IDSEL BIT(10)
40 #define CCR0_MASK_RIE   BIT(16)
41 #define CCR0_MASK_TIE   BIT(20)
42 #define CCR0_MASK_TEIE  BIT(21)
43 #define CCR0_MASK_SSE   BIT(24)
45 #define CCR1_MASK_CTSE   BIT(0)
46 #define CCR1_MASK_SPB2DT BIT(4)
47 #define CCR1_MASK_SPB2IO BIT(5)
48 #define CCR1_MASK_PE     BIT(8)
49 #define CCR1_MASK_PM     BIT(9)
50 #define CCR1_MASK_NFEN   BIT(28)
52 #define CCR2_MASK_BGDM  BIT(4)
53 #define CCR2_MASK_ABCS  BIT(5)
54 #define CCR2_MASK_ABCSE BIT(6)
55 #define CCR2_MASK_BRR   GENMASK(15, 8)
56 #define CCR2_MASK_BRME  BIT(16)
63 #define CCR3_MASK_STP   BIT(14)
64 #define CCR3_MASK_MP    BIT(19)
65 #define CCR3_MASK_FM    BIT(20)
66 #define CCR3_MASK_CKE   (BIT(24) | BIT(25))
67 #define CCR3_CKE_ENABLE BIT(24)
68 #define CCR3_CHR_7BIT   (BIT(8) | BIT(9))
69 #define CCR3_CHR_8BIT   BIT(9)
71 #define CCR4_MASK_ASEN BIT(16)
72 #define CCR4_MASK_ATEN BIT(17)
74 #define FCR_MASK_TFRST BIT(15)
75 #define FCR_MASK_RFRST BIT(23)
76 #define FCR_MASK_TTRG  GENMASK(12, 8)
78 #define FCR_TTRG_15    (15 << 8)
81 #define CSR_MASK_ORER BIT(24)
82 #define CSR_MASK_PER  BIT(27)
83 #define CSR_MASK_FER  BIT(28)
84 #define CSR_MASK_TDRE BIT(29)
85 #define CSR_MASK_TEND BIT(30)
86 #define CSR_MASK_RDRF BIT(31)
88 #define FRSR_MASK_DR BIT(0)
93 #define CFCLR_MASK_ERSC  BIT(4)
94 #define CFCLR_MASK_DCMFC BIT(16)
95 #define CFCLR_MASK_DPERC BIT(17)
96 #define CFCLR_MASK_DFERC BIT(18)
97 #define CFCLR_MASK_ORERC BIT(24)
98 #define CFCLR_MASK_MFFC  BIT(26)
99 #define CFCLR_MASK_PERC  BIT(27)
100 #define CFCLR_MASK_FERC  BIT(28)
101 #define CFCLR_MASK_TDREC BIT(29)
102 #define CFCLR_MASK_RDRFC BIT(31)
108 #define FFCLR_MASK_DRC BIT(0)
111 #define MSTPCRA_MASK_SCIx(x)   BIT(x + 8)
114 #define CCR2_MDDR_128	BIT(31)
117 #define CCR2_BRR_243	(0xf3 << 8)
118 #define CCR2_BRR_39	(0x27 << 8)
119 #define CCR2_BGDM_1	BIT(4)