Lines Matching refs:index
1010 #define UART_RA_SCI_B_IRQ_CONFIG_INIT(index) \ argument
1012 R_ICU->IELSR[DT_IRQ_BY_NAME(DT_INST_PARENT(index), rxi, irq)] = \
1013 ELC_EVENT_SCI_RXI(DT_INST_PROP(index, channel)); \
1014 R_ICU->IELSR[DT_IRQ_BY_NAME(DT_INST_PARENT(index), txi, irq)] = \
1015 ELC_EVENT_SCI_TXI(DT_INST_PROP(index, channel)); \
1016 R_ICU->IELSR[DT_IRQ_BY_NAME(DT_INST_PARENT(index), tei, irq)] = \
1017 ELC_EVENT_SCI_TEI(DT_INST_PROP(index, channel)); \
1018 R_ICU->IELSR[DT_IRQ_BY_NAME(DT_INST_PARENT(index), eri, irq)] = \
1019 ELC_EVENT_SCI_ERI(DT_INST_PROP(index, channel)); \
1021 IRQ_CONNECT(DT_IRQ_BY_NAME(DT_INST_PARENT(index), rxi, irq), \
1022 DT_IRQ_BY_NAME(DT_INST_PARENT(index), rxi, priority), \
1023 uart_ra_sci_b_rxi_isr, DEVICE_DT_INST_GET(index), 0); \
1024 IRQ_CONNECT(DT_IRQ_BY_NAME(DT_INST_PARENT(index), txi, irq), \
1025 DT_IRQ_BY_NAME(DT_INST_PARENT(index), txi, priority), \
1026 uart_ra_sci_b_txi_isr, DEVICE_DT_INST_GET(index), 0); \
1027 IRQ_CONNECT(DT_IRQ_BY_NAME(DT_INST_PARENT(index), tei, irq), \
1028 DT_IRQ_BY_NAME(DT_INST_PARENT(index), tei, priority), \
1029 uart_ra_sci_b_tei_isr, DEVICE_DT_INST_GET(index), 0); \
1030 IRQ_CONNECT(DT_IRQ_BY_NAME(DT_INST_PARENT(index), eri, irq), \
1031 DT_IRQ_BY_NAME(DT_INST_PARENT(index), eri, priority), \
1032 uart_ra_sci_b_eri_isr, DEVICE_DT_INST_GET(index), 0); \
1037 #define UART_RA_SCI_B_IRQ_CONFIG_INIT(index) argument
1043 #define UART_RA_SCI_B_DTC_INIT(index) \ argument
1045 uart_ra_sci_b_data_##index.fsp_config.p_transfer_rx = \
1046 &uart_ra_sci_b_data_##index.rx_transfer; \
1047 uart_ra_sci_b_data_##index.fsp_config.p_transfer_tx = \
1048 &uart_ra_sci_b_data_##index.tx_transfer; \
1051 #define UART_RA_SCI_B_ASYNC_INIT(index) \ argument
1067 DT_IRQ_BY_NAME(DT_INST_PARENT(index), rxi, irq)}, \
1070 .p_info = &uart_ra_sci_b_data_##index.rx_transfer_info, \
1071 .p_extend = &uart_ra_sci_b_data_##index.rx_transfer_cfg_extend, \
1075 .p_ctrl = &uart_ra_sci_b_data_##index.rx_transfer_ctrl, \
1076 .p_cfg = &uart_ra_sci_b_data_##index.rx_transfer_cfg, \
1094 DT_IRQ_BY_NAME(DT_INST_PARENT(index), txi, irq)}, \
1097 .p_info = &uart_ra_sci_b_data_##index.tx_transfer_info, \
1098 .p_extend = &uart_ra_sci_b_data_##index.tx_transfer_cfg_extend, \
1101 .p_ctrl = &uart_ra_sci_b_data_##index.tx_transfer_ctrl, \
1102 .p_cfg = &uart_ra_sci_b_data_##index.tx_transfer_cfg, \
1107 #define UART_RA_SCI_B_ASYNC_INIT(index) argument
1108 #define UART_RA_SCI_B_DTC_INIT(index) argument
1111 #define UART_RA_SCI_B_INIT(index) \ argument
1112 PINCTRL_DT_DEFINE(DT_INST_PARENT(index)); \
1114 static const struct uart_ra_sci_b_config uart_ra_sci_b_config_##index = { \
1115 .pcfg = PINCTRL_DT_DEV_CONFIG_GET(DT_INST_PARENT(index)), \
1116 .regs = (R_SCI_B0_Type *)DT_REG_ADDR(DT_INST_PARENT(index)), \
1119 static struct uart_ra_sci_b_data uart_ra_sci_b_data_##index = { \
1122 .baudrate = DT_INST_PROP(index, current_speed), \
1126 .flow_ctrl = COND_CODE_1(DT_INST_PROP(index, hw_flow_control), \
1132 .channel = DT_INST_PROP(index, channel), \
1133 .rxi_ipl = DT_IRQ_BY_NAME(DT_INST_PARENT(index), rxi, priority), \
1134 .rxi_irq = DT_IRQ_BY_NAME(DT_INST_PARENT(index), rxi, irq), \
1135 .txi_ipl = DT_IRQ_BY_NAME(DT_INST_PARENT(index), txi, priority), \
1136 .txi_irq = DT_IRQ_BY_NAME(DT_INST_PARENT(index), txi, irq), \
1137 .tei_ipl = DT_IRQ_BY_NAME(DT_INST_PARENT(index), tei, priority), \
1138 .tei_irq = DT_IRQ_BY_NAME(DT_INST_PARENT(index), tei, irq), \
1139 .eri_ipl = DT_IRQ_BY_NAME(DT_INST_PARENT(index), eri, priority), \
1140 .eri_irq = DT_IRQ_BY_NAME(DT_INST_PARENT(index), eri, irq), \
1144 .dev = DEVICE_DT_GET(DT_DRV_INST(index)), \
1145 UART_RA_SCI_B_ASYNC_INIT(index)}; \
1147 static int uart_ra_sci_b_init_##index(const struct device *dev) \
1149 UART_RA_SCI_B_DTC_INIT(index); \
1150 UART_RA_SCI_B_IRQ_CONFIG_INIT(index); \
1158 DEVICE_DT_INST_DEFINE(index, uart_ra_sci_b_init_##index, NULL, \
1159 &uart_ra_sci_b_data_##index, &uart_ra_sci_b_config_##index, \