Lines Matching refs:csr
43 uint32_t csr; member
330 (data->csr & (BIT(R_SCI_B0_CSR_TDRE_Pos) | BIT(R_SCI_B0_CSR_TEND_Pos))); in uart_ra_sci_b_irq_tx_ready()
338 return (cfg->regs->CCR0_b.TEIE == 1U) && (data->csr & BIT(R_SCI_B0_CSR_TEND_Pos)); in uart_ra_sci_b_irq_tx_complete()
361 ((data->csr & BIT(R_SCI_B0_CSR_RDRF_Pos)) || in uart_ra_sci_b_irq_rx_ready()
384 const uint32_t csr = cfg->regs->CSR; in uart_ra_sci_b_irq_is_pending() local
387 (csr & (BIT(R_SCI_B0_CSR_TEND_Pos) | BIT(R_SCI_B0_CSR_TDRE_Pos)))); in uart_ra_sci_b_irq_is_pending()
390 ((csr & (BIT(R_SCI_B0_CSR_RDRF_Pos) | BIT(R_SCI_B0_CSR_PER_Pos) | in uart_ra_sci_b_irq_is_pending()
404 data->csr = cfg->regs->CSR; in uart_ra_sci_b_irq_update()
406 if (data->csr & BIT(R_SCI_B0_CSR_PER_Pos)) { in uart_ra_sci_b_irq_update()
409 if (data->csr & BIT(R_SCI_B0_CSR_FER_Pos)) { in uart_ra_sci_b_irq_update()
412 if (data->csr & BIT(R_SCI_B0_CSR_ORER_Pos)) { in uart_ra_sci_b_irq_update()