124 static uint16_t uart_rcar_read_16(const struct device *dev,  in uart_rcar_read_16()  function
160 	if (!((uart_rcar_read_16(dev, SCFSR)) & SCFSR_RDF)) {  in uart_rcar_poll_in()
167 	reg_val = uart_rcar_read_16(dev, SCFSR);  in uart_rcar_poll_in()
184 	while (!(uart_rcar_read_16(dev, SCFSR) & SCFSR_TDFE)) {  in uart_rcar_poll_out()
189 	reg_val = uart_rcar_read_16(dev, SCFSR);  in uart_rcar_poll_out()
215 	reg_val = uart_rcar_read_16(dev, SCSCR);  in uart_rcar_configure()
220 	reg_val = uart_rcar_read_16(dev, SCFCR);  in uart_rcar_configure()
225 	reg_val = uart_rcar_read_16(dev, SCFSR);  in uart_rcar_configure()
229 	reg_val = uart_rcar_read_16(dev, SCLSR);  in uart_rcar_configure()
234 	reg_val = uart_rcar_read_16(dev, SCSCR);  in uart_rcar_configure()
239 	reg_val = uart_rcar_read_16(dev, SCSMR);  in uart_rcar_configure()
253 	reg_val = uart_rcar_read_16(dev, SCFCR);  in uart_rcar_configure()
259 	reg_val = uart_rcar_read_16(dev, SCSCR);  in uart_rcar_configure()
332 	return !!(uart_rcar_read_16(dev, SCSCR) & irq);  in uart_rcar_irq_is_enabled()
345 	       (uart_rcar_read_16(dev, SCFSR) & SCFSR_TDFE)) {  in uart_rcar_fifo_fill()
349 		reg_val = uart_rcar_read_16(dev, SCFSR);  in uart_rcar_fifo_fill()
370 	       (uart_rcar_read_16(dev, SCFSR) & SCFSR_RDF)) {  in uart_rcar_fifo_read()
374 		reg_val = uart_rcar_read_16(dev, SCFSR);  in uart_rcar_fifo_read()
392 	reg_val = uart_rcar_read_16(dev, SCSCR);  in uart_rcar_irq_tx_enable()
406 	reg_val = uart_rcar_read_16(dev, SCSCR);  in uart_rcar_irq_tx_disable()
415 	return !!(uart_rcar_read_16(dev, SCFSR) & SCFSR_TDFE);  in uart_rcar_irq_tx_ready()
425 	reg_val = uart_rcar_read_16(dev, SCSCR);  in uart_rcar_irq_rx_enable()
439 	reg_val = uart_rcar_read_16(dev, SCSCR);  in uart_rcar_irq_rx_disable()
448 	return !!(uart_rcar_read_16(dev, SCFSR) & SCFSR_RDF);  in uart_rcar_irq_rx_ready()
458 	reg_val = uart_rcar_read_16(dev, SCSCR);  in uart_rcar_irq_err_enable()
472 	reg_val = uart_rcar_read_16(dev, SCSCR);  in uart_rcar_irq_err_disable()