4  * SPDX-License-Identifier: Apache-2.0
46 #define SCFTDR          0x0c    /* Transmit FIFO Data Register */
48 #define SCFRDR          0x14    /* Receive FIFO Data Register */
49 #define SCFCR           0x18    /* FIFO Control Register */
50 #define SCFDR           0x1c    /* FIFO Data Count Register */
59 #define SCSMR_CHR       BIT(6)  /* 7-bit Character Length */
60 #define SCSMR_PE        BIT(5)  /* Parity Enable */
67 #define SCSCR_TEIE      BIT(11) /* Transmit End Interrupt Enable */
68 #define SCSCR_TIE       BIT(7)  /* Transmit Interrupt Enable */
69 #define SCSCR_RIE       BIT(6)  /* Receive Interrupt Enable */
70 #define SCSCR_TE        BIT(5)  /* Transmit Enable */
71 #define SCSCR_RE        BIT(4)  /* Receive Enable */
72 #define SCSCR_REIE      BIT(3)  /* Receive Error Interrupt Enable */
73 #define SCSCR_TOIE      BIT(2)  /* Timeout Interrupt Enable */
74 #define SCSCR_CKE1      BIT(1)  /* Clock Enable 1 */
75 #define SCSCR_CKE0      BIT(0)  /* Clock Enable 0 */
77 /* SCFCR (FIFO Control Register) */
78 #define SCFCR_RTRG1     BIT(7)  /* Receive FIFO Data Count Trigger 1 */
79 #define SCFCR_RTRG0     BIT(6)  /* Receive FIFO Data Count Trigger 0 */
80 #define SCFCR_TTRG1     BIT(5)  /* Transmit FIFO Data Count Trigger 1 */
81 #define SCFCR_TTRG0     BIT(4)  /* Transmit FIFO Data Count Trigger 0 */
82 #define SCFCR_MCE       BIT(3)  /* Modem Control Enable */
83 #define SCFCR_TFRST     BIT(2)  /* Transmit FIFO Data Register Reset */
84 #define SCFCR_RFRST     BIT(1)  /* Receive FIFO Data Register Reset */
98 #define SCFSR_TDFE      BIT(5)  /* Transmit FIFO Data Empty */
102 #define SCFSR_RDF       BIT(1)  /* Receive FIFO Data Full */
110 #define HSSRR_SRE            BIT(15)      /* Sampling Rate Register Enable */
139 	struct uart_rcar_data *data = dev->data;  in uart_rcar_set_baudrate()
140 	const struct uart_rcar_cfg *cfg = dev->config;  in uart_rcar_set_baudrate()
143 	if (cfg->is_hscif) {  in uart_rcar_set_baudrate()
144 		reg_val = data->clk_rate / (2 * (HSSRR_SRCYC_DEF_VAL + 1) * baud_rate) - 1;  in uart_rcar_set_baudrate()
146 		reg_val = ((data->clk_rate + 16 * baud_rate) / (32 * baud_rate) - 1);  in uart_rcar_set_baudrate()
153 	struct uart_rcar_data *data = dev->data;  in uart_rcar_poll_in()
157 	k_spinlock_key_t key = k_spin_lock(&data->lock);  in uart_rcar_poll_in()
159 	/* Receive FIFO empty */  in uart_rcar_poll_in()
161 		ret = -1;  in uart_rcar_poll_in()
172 	k_spin_unlock(&data->lock, key);  in uart_rcar_poll_in()
179 	struct uart_rcar_data *data = dev->data;  in uart_rcar_poll_out()
181 	k_spinlock_key_t key = k_spin_lock(&data->lock);  in uart_rcar_poll_out()
183 	/* Wait for empty space in transmit FIFO */  in uart_rcar_poll_out()
193 	k_spin_unlock(&data->lock, key);  in uart_rcar_poll_out()
199 	struct uart_rcar_data *data = dev->data;  in uart_rcar_configure()
200 	const struct uart_rcar_cfg *cfg_drv = dev->config;  in uart_rcar_configure()
205 	if (cfg->parity != UART_CFG_PARITY_NONE ||  in uart_rcar_configure()
206 	    cfg->stop_bits != UART_CFG_STOP_BITS_1 ||  in uart_rcar_configure()
207 	    cfg->data_bits != UART_CFG_DATA_BITS_8 ||  in uart_rcar_configure()
208 	    cfg->flow_ctrl != UART_CFG_FLOW_CTRL_NONE) {  in uart_rcar_configure()
209 		return -ENOTSUP;  in uart_rcar_configure()
212 	key = k_spin_lock(&data->lock);  in uart_rcar_configure()
219 	/* Emptying Transmit and Receive FIFO */  in uart_rcar_configure()
244 	if (cfg_drv->is_hscif) {  in uart_rcar_configure()
250 	uart_rcar_set_baudrate(dev, cfg->baudrate);  in uart_rcar_configure()
258 	/* Enable Transmit & Receive + disable Interrupts */  in uart_rcar_configure()
265 	data->current_config = *cfg;  in uart_rcar_configure()
267 	k_spin_unlock(&data->lock, key);  in uart_rcar_configure()
276 	struct uart_rcar_data *data = dev->data;  in uart_rcar_config_get()
278 	*cfg = data->current_config;  in uart_rcar_config_get()
286 	const struct uart_rcar_cfg *config = dev->config;  in uart_rcar_init()
287 	struct uart_rcar_data *data = dev->data;  in uart_rcar_init()
291 	ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);  in uart_rcar_init()
296 	if (!device_is_ready(config->clock_dev)) {  in uart_rcar_init()
297 		return -ENODEV;  in uart_rcar_init()
300 	ret = clock_control_on(config->clock_dev,  in uart_rcar_init()
301 			       (clock_control_subsys_t)&config->mod_clk);  in uart_rcar_init()
306 	ret = clock_control_get_rate(config->clock_dev,  in uart_rcar_init()
307 				     (clock_control_subsys_t)&config->bus_clk,  in uart_rcar_init()
308 				     &data->clk_rate);  in uart_rcar_init()
315 	ret = uart_rcar_configure(dev, &data->current_config);  in uart_rcar_init()
321 	config->irq_config_func(dev);  in uart_rcar_init()
339 	struct uart_rcar_data *data = dev->data;  in uart_rcar_fifo_fill()
342 	k_spinlock_key_t key = k_spin_lock(&data->lock);  in uart_rcar_fifo_fill()
344 	while (((len - num_tx) > 0) &&  in uart_rcar_fifo_fill()
356 	k_spin_unlock(&data->lock, key);  in uart_rcar_fifo_fill()
364 	struct uart_rcar_data *data = dev->data;  in uart_rcar_fifo_read()
367 	k_spinlock_key_t key = k_spin_lock(&data->lock);  in uart_rcar_fifo_read()
369 	while (((size - num_rx) > 0) &&  in uart_rcar_fifo_read()
380 	k_spin_unlock(&data->lock, key);  in uart_rcar_fifo_read()
387 	struct uart_rcar_data *data = dev->data;  in uart_rcar_irq_tx_enable()
390 	k_spinlock_key_t key = k_spin_lock(&data->lock);  in uart_rcar_irq_tx_enable()
396 	k_spin_unlock(&data->lock, key);  in uart_rcar_irq_tx_enable()
401 	struct uart_rcar_data *data = dev->data;  in uart_rcar_irq_tx_disable()
404 	k_spinlock_key_t key = k_spin_lock(&data->lock);  in uart_rcar_irq_tx_disable()
410 	k_spin_unlock(&data->lock, key);  in uart_rcar_irq_tx_disable()
420 	struct uart_rcar_data *data = dev->data;  in uart_rcar_irq_rx_enable()
423 	k_spinlock_key_t key = k_spin_lock(&data->lock);  in uart_rcar_irq_rx_enable()
429 	k_spin_unlock(&data->lock, key);  in uart_rcar_irq_rx_enable()
434 	struct uart_rcar_data *data = dev->data;  in uart_rcar_irq_rx_disable()
437 	k_spinlock_key_t key = k_spin_lock(&data->lock);  in uart_rcar_irq_rx_disable()
443 	k_spin_unlock(&data->lock, key);  in uart_rcar_irq_rx_disable()
453 	struct uart_rcar_data *data = dev->data;  in uart_rcar_irq_err_enable()
456 	k_spinlock_key_t key = k_spin_lock(&data->lock);  in uart_rcar_irq_err_enable()
462 	k_spin_unlock(&data->lock, key);  in uart_rcar_irq_err_enable()
467 	struct uart_rcar_data *data = dev->data;  in uart_rcar_irq_err_disable()
470 	k_spinlock_key_t key = k_spin_lock(&data->lock);  in uart_rcar_irq_err_disable()
476 	k_spin_unlock(&data->lock, key);  in uart_rcar_irq_err_disable()
494 	struct uart_rcar_data *data = dev->data;  in uart_rcar_irq_callback_set()
496 	data->callback = cb;  in uart_rcar_irq_callback_set()
497 	data->cb_data = cb_data;  in uart_rcar_irq_callback_set()
509 	struct uart_rcar_data *data = dev->data;  in uart_rcar_isr()
511 	if (data->callback) {  in uart_rcar_isr()
512 		data->callback(dev, data->cb_data);  in uart_rcar_isr()