19 	UART0_Type *base;  member
39 	uint32_t flags = LPSCI_GetStatusFlags(config->base);  in mcux_lpsci_poll_in()
43 		*c = LPSCI_ReadByte(config->base);  in mcux_lpsci_poll_in()
54 	while (!(LPSCI_GetStatusFlags(config->base)  in mcux_lpsci_poll_out()
58 	LPSCI_WriteByte(config->base, c);  in mcux_lpsci_poll_out()
64 	uint32_t flags = LPSCI_GetStatusFlags(config->base);  in mcux_lpsci_err_check()
79 	LPSCI_ClearStatusFlags(config->base, kLPSCI_RxOverrunFlag |  in mcux_lpsci_err_check()
95 	       (LPSCI_GetStatusFlags(config->base)  in mcux_lpsci_fifo_fill()
98 		LPSCI_WriteByte(config->base, tx_data[num_tx++]);  in mcux_lpsci_fifo_fill()
111 	       (LPSCI_GetStatusFlags(config->base)  in mcux_lpsci_fifo_read()
114 		rx_data[num_rx++] = LPSCI_ReadByte(config->base);  in mcux_lpsci_fifo_read()
125 	LPSCI_EnableInterrupts(config->base, mask);  in mcux_lpsci_irq_tx_enable()
133 	LPSCI_DisableInterrupts(config->base, mask);  in mcux_lpsci_irq_tx_disable()
139 	uint32_t flags = LPSCI_GetStatusFlags(config->base);  in mcux_lpsci_irq_tx_complete()
148 	uint32_t flags = LPSCI_GetStatusFlags(config->base);  in mcux_lpsci_irq_tx_ready()
150 	return (LPSCI_GetEnabledInterrupts(config->base) & mask)  in mcux_lpsci_irq_tx_ready()
159 	LPSCI_EnableInterrupts(config->base, mask);  in mcux_lpsci_irq_rx_enable()
167 	LPSCI_DisableInterrupts(config->base, mask);  in mcux_lpsci_irq_rx_disable()
173 	uint32_t flags = LPSCI_GetStatusFlags(config->base);  in mcux_lpsci_irq_rx_full()
183 	return (LPSCI_GetEnabledInterrupts(config->base) & mask)  in mcux_lpsci_irq_rx_pending()
194 	LPSCI_EnableInterrupts(config->base, mask);  in mcux_lpsci_irq_err_enable()
204 	LPSCI_DisableInterrupts(config->base, mask);  in mcux_lpsci_irq_err_disable()
259 	LPSCI_Init(config->base, &uart_config, clock_freq);  in mcux_lpsci_init()
318 	.base = (UART0_Type *)DT_INST_REG_ADDR(n),			\