Lines Matching +full:rx +full:- +full:dma +full:- +full:channel
2 * Copyright (c) 2017, 2022-2023 NXP
4 * SPDX-License-Identifier: Apache-2.0
23 #include <zephyr/drivers/dma.h>
31 uint8_t channel; member
93 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_poll_in()
94 uint32_t flags = USART_GetStatusFlags(config->base); in mcux_flexcomm_poll_in()
95 int ret = -1; in mcux_flexcomm_poll_in()
98 *c = USART_ReadByte(config->base); in mcux_flexcomm_poll_in()
108 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_poll_out()
111 while (!(USART_GetStatusFlags(config->base) & kUSART_TxFifoEmptyFlag)) { in mcux_flexcomm_poll_out()
114 USART_WriteByte(config->base, c); in mcux_flexcomm_poll_out()
119 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_err_check()
120 uint32_t flags = USART_GetStatusFlags(config->base); in mcux_flexcomm_err_check()
135 USART_ClearStatusFlags(config->base, in mcux_flexcomm_err_check()
148 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_fifo_fill()
151 while ((len - num_tx > 0) && in mcux_flexcomm_fifo_fill()
152 (USART_GetStatusFlags(config->base) in mcux_flexcomm_fifo_fill()
155 USART_WriteByte(config->base, tx_data[num_tx++]); in mcux_flexcomm_fifo_fill()
164 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_fifo_read()
167 while ((len - num_rx > 0) && in mcux_flexcomm_fifo_read()
168 (USART_GetStatusFlags(config->base) in mcux_flexcomm_fifo_read()
171 rx_data[num_rx++] = USART_ReadByte(config->base); in mcux_flexcomm_fifo_read()
179 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_irq_tx_enable()
182 USART_EnableInterrupts(config->base, mask); in mcux_flexcomm_irq_tx_enable()
187 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_irq_tx_disable()
190 USART_DisableInterrupts(config->base, mask); in mcux_flexcomm_irq_tx_disable()
195 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_irq_tx_complete()
197 return (config->base->STAT & USART_STAT_TXIDLE_MASK) != 0; in mcux_flexcomm_irq_tx_complete()
202 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_irq_tx_ready()
204 uint32_t flags = USART_GetStatusFlags(config->base); in mcux_flexcomm_irq_tx_ready()
206 return (USART_GetEnabledInterrupts(config->base) & mask) in mcux_flexcomm_irq_tx_ready()
212 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_irq_rx_enable()
215 USART_EnableInterrupts(config->base, mask); in mcux_flexcomm_irq_rx_enable()
220 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_irq_rx_disable()
223 USART_DisableInterrupts(config->base, mask); in mcux_flexcomm_irq_rx_disable()
228 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_irq_rx_full()
229 uint32_t flags = USART_GetStatusFlags(config->base); in mcux_flexcomm_irq_rx_full()
236 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_irq_rx_pending()
239 return (USART_GetEnabledInterrupts(config->base) & mask) in mcux_flexcomm_irq_rx_pending()
245 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_irq_err_enable()
250 USART_EnableInterrupts(config->base, mask); in mcux_flexcomm_irq_err_enable()
255 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_irq_err_disable()
260 USART_DisableInterrupts(config->base, mask); in mcux_flexcomm_irq_err_disable()
278 struct mcux_flexcomm_data *data = dev->data; in mcux_flexcomm_irq_callback_set()
280 data->irq_callback = cb; in mcux_flexcomm_irq_callback_set()
281 data->irq_cb_data = cb_data; in mcux_flexcomm_irq_callback_set()
284 data->async_callback = NULL; in mcux_flexcomm_irq_callback_set()
285 data->async_cb_data = NULL; in mcux_flexcomm_irq_callback_set()
293 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_uart_configure()
294 struct mcux_flexcomm_data *data = dev->data; in mcux_flexcomm_uart_configure()
295 struct uart_config *uart_config = &data->uart_config; in mcux_flexcomm_uart_configure()
307 if (cfg->parity == UART_CFG_PARITY_ODD) { in mcux_flexcomm_uart_configure()
309 } else if (cfg->parity == UART_CFG_PARITY_EVEN) { in mcux_flexcomm_uart_configure()
311 } else if (cfg->parity == UART_CFG_PARITY_NONE) { in mcux_flexcomm_uart_configure()
314 return -ENOTSUP; in mcux_flexcomm_uart_configure()
319 usart_config.baudRate_Bps = cfg->baudrate; in mcux_flexcomm_uart_configure()
322 if (cfg->stop_bits == UART_CFG_STOP_BITS_1) { in mcux_flexcomm_uart_configure()
324 } else if (cfg->stop_bits == UART_CFG_STOP_BITS_2) { in mcux_flexcomm_uart_configure()
327 return -ENOTSUP; in mcux_flexcomm_uart_configure()
332 if (cfg->data_bits == UART_CFG_DATA_BITS_5 || in mcux_flexcomm_uart_configure()
333 cfg->data_bits == UART_CFG_DATA_BITS_6) { in mcux_flexcomm_uart_configure()
334 return -ENOTSUP; in mcux_flexcomm_uart_configure()
335 } else if (cfg->data_bits == UART_CFG_DATA_BITS_7) { in mcux_flexcomm_uart_configure()
337 } else if (cfg->data_bits == UART_CFG_DATA_BITS_8) { in mcux_flexcomm_uart_configure()
339 } else if (cfg->data_bits == UART_CFG_DATA_BITS_9) { in mcux_flexcomm_uart_configure()
342 return -EINVAL; in mcux_flexcomm_uart_configure()
347 if (cfg->flow_ctrl == UART_CFG_FLOW_CTRL_NONE) { in mcux_flexcomm_uart_configure()
349 } else if (cfg->flow_ctrl == UART_CFG_FLOW_CTRL_RTS_CTS) { in mcux_flexcomm_uart_configure()
352 return -ENOTSUP; in mcux_flexcomm_uart_configure()
356 USART_Deinit(config->base); in mcux_flexcomm_uart_configure()
359 clock_control_get_rate(config->clock_dev, in mcux_flexcomm_uart_configure()
360 config->clock_subsys, &clock_freq); in mcux_flexcomm_uart_configure()
363 USART_Enable9bitMode(config->base, nine_bit_mode); in mcux_flexcomm_uart_configure()
366 USART_Init(config->base, &usart_config, clock_freq); in mcux_flexcomm_uart_configure()
369 uart_config->parity = cfg->parity; in mcux_flexcomm_uart_configure()
370 uart_config->baudrate = cfg->baudrate; in mcux_flexcomm_uart_configure()
371 uart_config->stop_bits = cfg->stop_bits; in mcux_flexcomm_uart_configure()
372 uart_config->data_bits = cfg->data_bits; in mcux_flexcomm_uart_configure()
373 uart_config->flow_ctrl = cfg->flow_ctrl; in mcux_flexcomm_uart_configure()
381 struct mcux_flexcomm_data *data = dev->data; in mcux_flexcomm_uart_config_get()
382 *cfg = data->uart_config; in mcux_flexcomm_uart_config_get()
392 const struct mcux_flexcomm_data *data = dev->data; in async_user_callback()
394 if (data->async_callback) { in async_user_callback()
395 data->async_callback(dev, evt, data->async_cb_data); in async_user_callback()
403 struct mcux_flexcomm_data *data = dev->data; in mcux_flexcomm_uart_callback_set()
405 data->async_callback = callback; in mcux_flexcomm_uart_callback_set()
406 data->async_cb_data = user_data; in mcux_flexcomm_uart_callback_set()
410 data->irq_callback = NULL; in mcux_flexcomm_uart_callback_set()
411 data->irq_cb_data = NULL; in mcux_flexcomm_uart_callback_set()
420 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_uart_tx()
421 struct mcux_flexcomm_data *data = dev->data; in mcux_flexcomm_uart_tx()
424 if (config->tx_dma.dev == NULL) { in mcux_flexcomm_uart_tx()
425 return -ENODEV; in mcux_flexcomm_uart_tx()
430 /* Getting DMA status to tell if channel is busy or not set up */ in mcux_flexcomm_uart_tx()
433 ret = dma_get_status(config->tx_dma.dev, config->tx_dma.channel, &status); in mcux_flexcomm_uart_tx()
443 return -EBUSY; in mcux_flexcomm_uart_tx()
446 /* Disable TX DMA requests for uart while setting up */ in mcux_flexcomm_uart_tx()
447 USART_EnableTxDMA(config->base, false); in mcux_flexcomm_uart_tx()
449 /* Set up the dma channel/transfer */ in mcux_flexcomm_uart_tx()
450 data->tx_data.xfer_buf = buf; in mcux_flexcomm_uart_tx()
451 data->tx_data.xfer_len = len; in mcux_flexcomm_uart_tx()
452 data->tx_data.active_block.source_address = (uint32_t)buf; in mcux_flexcomm_uart_tx()
453 data->tx_data.active_block.dest_address = (uint32_t) &config->base->FIFOWR; in mcux_flexcomm_uart_tx()
454 data->tx_data.active_block.block_size = len; in mcux_flexcomm_uart_tx()
455 data->tx_data.active_block.next_block = NULL; in mcux_flexcomm_uart_tx()
457 ret = dma_config(config->tx_dma.dev, config->tx_dma.channel, in mcux_flexcomm_uart_tx()
458 (struct dma_config *) &config->tx_dma.cfg); in mcux_flexcomm_uart_tx()
465 config->base->FIFOINTENSET |= USART_FIFOINTENSET_TXLVL_MASK; in mcux_flexcomm_uart_tx()
467 /* Enable TX DMA requests */ in mcux_flexcomm_uart_tx()
468 USART_EnableTxDMA(config->base, true); in mcux_flexcomm_uart_tx()
470 /* Trigger the DMA to start transfer */ in mcux_flexcomm_uart_tx()
471 ret = dma_start(config->tx_dma.dev, config->tx_dma.channel); in mcux_flexcomm_uart_tx()
479 k_work_schedule(&data->tx_data.timeout_work, K_USEC(timeout)); in mcux_flexcomm_uart_tx()
489 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_uart_tx_abort()
490 struct mcux_flexcomm_data *data = dev->data; in mcux_flexcomm_uart_tx_abort()
493 /* First disable DMA requests from UART to prevent transfer in mcux_flexcomm_uart_tx_abort()
496 USART_EnableTxDMA(config->base, false); in mcux_flexcomm_uart_tx_abort()
499 if (data->tx_data.xfer_len == 0) { in mcux_flexcomm_uart_tx_abort()
500 return -EFAULT; in mcux_flexcomm_uart_tx_abort()
504 (void)k_work_cancel_delayable(&data->tx_data.timeout_work); in mcux_flexcomm_uart_tx_abort()
506 /* Getting dma status to use to calculate bytes sent */ in mcux_flexcomm_uart_tx_abort()
509 ret = dma_get_status(config->tx_dma.dev, config->tx_dma.channel, &status); in mcux_flexcomm_uart_tx_abort()
514 /* Done with the DMA transfer, can stop it now */ in mcux_flexcomm_uart_tx_abort()
515 ret = dma_stop(config->tx_dma.dev, config->tx_dma.channel); in mcux_flexcomm_uart_tx_abort()
521 size_t sent_len = data->tx_data.xfer_len - status.pending_length; in mcux_flexcomm_uart_tx_abort()
522 const uint8_t *aborted_buf = data->tx_data.xfer_buf; in mcux_flexcomm_uart_tx_abort()
533 data->tx_data.xfer_len = 0; in mcux_flexcomm_uart_tx_abort()
534 data->tx_data.xfer_buf = NULL; in mcux_flexcomm_uart_tx_abort()
544 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_uart_rx_enable()
545 struct mcux_flexcomm_data *data = dev->data; in mcux_flexcomm_uart_rx_enable()
548 if (config->rx_dma.dev == NULL) { in mcux_flexcomm_uart_rx_enable()
549 return -ENODEV; in mcux_flexcomm_uart_rx_enable()
552 /* Getting DMA status to tell if channel is busy or not set up */ in mcux_flexcomm_uart_rx_enable()
555 ret = dma_get_status(config->rx_dma.dev, config->rx_dma.channel, &status); in mcux_flexcomm_uart_rx_enable()
563 return -EBUSY; in mcux_flexcomm_uart_rx_enable()
566 /* Disable RX DMA requests for uart while setting up */ in mcux_flexcomm_uart_rx_enable()
567 USART_EnableRxDMA(config->base, false); in mcux_flexcomm_uart_rx_enable()
569 /* Set up the dma channel/transfer */ in mcux_flexcomm_uart_rx_enable()
570 data->rx_data.xfer_buf = buf; in mcux_flexcomm_uart_rx_enable()
571 data->rx_data.xfer_len = len; in mcux_flexcomm_uart_rx_enable()
572 data->rx_data.active_block.dest_address = (uint32_t)data->rx_data.xfer_buf; in mcux_flexcomm_uart_rx_enable()
573 data->rx_data.active_block.source_address = (uint32_t) &config->base->FIFORD; in mcux_flexcomm_uart_rx_enable()
574 data->rx_data.active_block.block_size = data->rx_data.xfer_len; in mcux_flexcomm_uart_rx_enable()
576 ret = dma_config(config->rx_dma.dev, config->rx_dma.channel, in mcux_flexcomm_uart_rx_enable()
577 (struct dma_config *) &config->rx_dma.cfg); in mcux_flexcomm_uart_rx_enable()
582 data->rx_data.timeout = timeout; in mcux_flexcomm_uart_rx_enable()
584 /* Enable RX DMA requests from UART */ in mcux_flexcomm_uart_rx_enable()
585 USART_EnableRxDMA(config->base, true); in mcux_flexcomm_uart_rx_enable()
592 config->base->INTENSET |= USART_INTENSET_STARTEN_MASK; in mcux_flexcomm_uart_rx_enable()
595 /* Trigger the DMA to start transfer */ in mcux_flexcomm_uart_rx_enable()
596 ret = dma_start(config->rx_dma.dev, config->rx_dma.channel); in mcux_flexcomm_uart_rx_enable()
613 const struct mcux_flexcomm_config *config = dev->config; in flexcomm_uart_rx_update()
614 struct mcux_flexcomm_data *data = dev->data; in flexcomm_uart_rx_update()
618 (void)dma_get_status(config->rx_dma.dev, config->rx_dma.channel, &status); in flexcomm_uart_rx_update()
620 /* Calculate how many bytes have been received by RX DMA */ in flexcomm_uart_rx_update()
621 size_t total_rx_receive_len = data->rx_data.xfer_len - status.pending_length; in flexcomm_uart_rx_update()
623 /* Generate RX ready event if there has been new data received */ in flexcomm_uart_rx_update()
624 if (total_rx_receive_len > data->rx_data.offset) { in flexcomm_uart_rx_update()
626 data->rx_data.count = total_rx_receive_len - data->rx_data.offset; in flexcomm_uart_rx_update()
629 .data.rx.buf = data->rx_data.xfer_buf, in flexcomm_uart_rx_update()
630 .data.rx.len = data->rx_data.count, in flexcomm_uart_rx_update()
631 .data.rx.offset = data->rx_data.offset, in flexcomm_uart_rx_update()
638 data->rx_data.offset += data->rx_data.count; in flexcomm_uart_rx_update()
639 data->rx_data.count = 0; in flexcomm_uart_rx_update()
645 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_uart_rx_disable()
646 struct mcux_flexcomm_data *data = dev->data; in mcux_flexcomm_uart_rx_disable()
649 /* This bit can be used to check if RX is already disabled in mcux_flexcomm_uart_rx_disable()
650 * because it is the bit changed by enabling and disabling DMA in mcux_flexcomm_uart_rx_disable()
651 * requests, and in this driver, RX DMA requests should only be in mcux_flexcomm_uart_rx_disable()
652 * disabled when the rx function is disabled other than when in mcux_flexcomm_uart_rx_disable()
655 if (!(config->base->FIFOCFG & USART_FIFOCFG_DMARX_MASK)) { in mcux_flexcomm_uart_rx_disable()
656 return -EFAULT; in mcux_flexcomm_uart_rx_disable()
660 (void)k_work_cancel_delayable(&data->rx_data.timeout_work); in mcux_flexcomm_uart_rx_disable()
663 /* Disable RX requests to pause DMA first and measure what happened, in mcux_flexcomm_uart_rx_disable()
664 * Can't stop yet because DMA pending length is needed to in mcux_flexcomm_uart_rx_disable()
667 USART_EnableRxDMA(config->base, false); in mcux_flexcomm_uart_rx_disable()
669 /* Check if RX data received and generate rx ready event if so */ in mcux_flexcomm_uart_rx_disable()
672 /* Notify DMA driver to stop transfer only after RX data handled */ in mcux_flexcomm_uart_rx_disable()
673 ret = dma_stop(config->rx_dma.dev, config->rx_dma.channel); in mcux_flexcomm_uart_rx_disable()
681 .data.rx_buf.buf = data->rx_data.xfer_buf, in mcux_flexcomm_uart_rx_disable()
687 if (data->rx_data.next_xfer_buf) { in mcux_flexcomm_uart_rx_disable()
690 .data.rx_buf.buf = data->rx_data.next_xfer_buf in mcux_flexcomm_uart_rx_disable()
696 /* Reset RX driver data */ in mcux_flexcomm_uart_rx_disable()
697 data->rx_data.xfer_buf = NULL; in mcux_flexcomm_uart_rx_disable()
698 data->rx_data.xfer_len = 0; in mcux_flexcomm_uart_rx_disable()
699 data->rx_data.next_xfer_buf = NULL; in mcux_flexcomm_uart_rx_disable()
700 data->rx_data.next_xfer_len = 0; in mcux_flexcomm_uart_rx_disable()
701 data->rx_data.offset = 0; in mcux_flexcomm_uart_rx_disable()
702 data->rx_data.count = 0; in mcux_flexcomm_uart_rx_disable()
704 /* Final event is the RX disable event */ in mcux_flexcomm_uart_rx_disable()
716 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_uart_rx_buf_rsp()
717 struct mcux_flexcomm_data *data = dev->data; in mcux_flexcomm_uart_rx_buf_rsp()
720 if (data->rx_data.next_xfer_buf != NULL || data->rx_data.next_xfer_len != 0) { in mcux_flexcomm_uart_rx_buf_rsp()
721 return -EBUSY; in mcux_flexcomm_uart_rx_buf_rsp()
724 /* DMA requests are disabled, meaning the RX has been disabled */ in mcux_flexcomm_uart_rx_buf_rsp()
725 if (!(config->base->FIFOCFG & USART_FIFOCFG_DMARX_MASK)) { in mcux_flexcomm_uart_rx_buf_rsp()
726 return -EACCES; in mcux_flexcomm_uart_rx_buf_rsp()
730 data->rx_data.next_xfer_buf = buf; in mcux_flexcomm_uart_rx_buf_rsp()
731 data->rx_data.next_xfer_len = len; in mcux_flexcomm_uart_rx_buf_rsp()
736 /* This callback is from the TX DMA and consumed by this driver */
738 uint32_t channel, int status) in mcux_flexcomm_uart_dma_tx_callback() argument
740 /* DMA callback data was configured during driver init as UART device ptr */ in mcux_flexcomm_uart_dma_tx_callback()
743 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_uart_dma_tx_callback()
744 struct mcux_flexcomm_data *data = dev->data; in mcux_flexcomm_uart_dma_tx_callback()
749 USART_EnableTxDMA(config->base, false); in mcux_flexcomm_uart_dma_tx_callback()
752 (void)k_work_cancel_delayable(&data->tx_data.timeout_work); in mcux_flexcomm_uart_dma_tx_callback()
757 /* This callback is from the RX DMA and consumed by this driver */
759 uint32_t channel, int status) in mcux_flexcomm_uart_dma_rx_callback() argument
761 /* DMA callback data was configured during driver init as UART device ptr */ in mcux_flexcomm_uart_dma_rx_callback()
764 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_uart_dma_rx_callback()
765 struct mcux_flexcomm_data *data = dev->data; in mcux_flexcomm_uart_dma_rx_callback()
768 (void)k_work_cancel_delayable(&data->rx_data.timeout_work); in mcux_flexcomm_uart_dma_rx_callback()
770 /* Update user with received RX data if needed */ in mcux_flexcomm_uart_dma_rx_callback()
776 .data.rx_buf.buf = data->rx_data.xfer_buf, in mcux_flexcomm_uart_dma_rx_callback()
781 if (data->rx_data.next_xfer_buf) { in mcux_flexcomm_uart_dma_rx_callback()
783 data->rx_data.xfer_buf = data->rx_data.next_xfer_buf; in mcux_flexcomm_uart_dma_rx_callback()
784 data->rx_data.xfer_len = data->rx_data.next_xfer_len; in mcux_flexcomm_uart_dma_rx_callback()
785 data->rx_data.next_xfer_buf = NULL; in mcux_flexcomm_uart_dma_rx_callback()
786 data->rx_data.next_xfer_len = 0; in mcux_flexcomm_uart_dma_rx_callback()
788 /* Reload DMA channel with new buffer */ in mcux_flexcomm_uart_dma_rx_callback()
789 data->rx_data.active_block.block_size = data->rx_data.xfer_len; in mcux_flexcomm_uart_dma_rx_callback()
790 data->rx_data.active_block.dest_address = (uint32_t) data->rx_data.xfer_buf; in mcux_flexcomm_uart_dma_rx_callback()
791 dma_reload(config->rx_dma.dev, config->rx_dma.channel, in mcux_flexcomm_uart_dma_rx_callback()
792 data->rx_data.active_block.source_address, in mcux_flexcomm_uart_dma_rx_callback()
793 data->rx_data.active_block.dest_address, in mcux_flexcomm_uart_dma_rx_callback()
794 data->rx_data.active_block.block_size); in mcux_flexcomm_uart_dma_rx_callback()
804 dma_start(config->rx_dma.dev, config->rx_dma.channel); in mcux_flexcomm_uart_dma_rx_callback()
807 /* If there is no next available buffer then disable DMA */ in mcux_flexcomm_uart_dma_rx_callback()
812 data->rx_data.count = 0; in mcux_flexcomm_uart_dma_rx_callback()
813 data->rx_data.offset = 0; in mcux_flexcomm_uart_dma_rx_callback()
819 * needed by INPUTMUX_EnableSignal to allow the UART's DMA
820 * request to reach the DMA.
822 static uint32_t fc_uart_calc_inmux_connection(uint8_t channel, DMA_Type *base) in fc_uart_calc_inmux_connection() argument
838 if (channel >= 16 && !(channel >= 24 && channel <= 27)) { in fc_uart_calc_inmux_connection()
848 if (channel <= 15 || (channel >= 24 && channel <= 27)) { in fc_uart_calc_inmux_connection()
850 } else if (channel >= 16 && channel <= 23) { in fc_uart_calc_inmux_connection()
851 chmux_sel = (chmux_sel_id + 4 * (channel - 16)) in fc_uart_calc_inmux_connection()
854 chmux_sel = (chmux_sel_id + 4 * (channel - 20)) in fc_uart_calc_inmux_connection()
871 if (channel <= 31) { in fc_uart_calc_inmux_connection()
872 en_val = channel + (req_en_id << ENA_SHIFT); in fc_uart_calc_inmux_connection()
874 en_val = (channel - 32) + ((req_en_id + 4) << ENA_SHIFT); in fc_uart_calc_inmux_connection()
882 #endif /* RT 3-digit */
887 const struct mcux_flexcomm_config *config = dev->config; in flexcomm_uart_async_init()
888 struct mcux_flexcomm_data *data = dev->data; in flexcomm_uart_async_init()
890 if (config->rx_dma.dev == NULL || in flexcomm_uart_async_init()
891 config->tx_dma.dev == NULL) { in flexcomm_uart_async_init()
892 return -ENODEV; in flexcomm_uart_async_init()
895 if (!device_is_ready(config->rx_dma.dev) || in flexcomm_uart_async_init()
896 !device_is_ready(config->tx_dma.dev)) { in flexcomm_uart_async_init()
897 return -ENODEV; in flexcomm_uart_async_init()
900 /* Disable DMA requests */ in flexcomm_uart_async_init()
901 USART_EnableTxDMA(config->base, false); in flexcomm_uart_async_init()
902 USART_EnableRxDMA(config->base, false); in flexcomm_uart_async_init()
904 /* Route DMA requests */ in flexcomm_uart_async_init()
906 /* RT 3 digit uses input mux to route DMA requests from in flexcomm_uart_async_init()
907 * the UART peripheral to a hardware designated DMA channel in flexcomm_uart_async_init()
911 fc_uart_calc_inmux_connection(config->rx_dma.channel, in flexcomm_uart_async_init()
912 config->rx_dma.base), true); in flexcomm_uart_async_init()
914 fc_uart_calc_inmux_connection(config->tx_dma.channel, in flexcomm_uart_async_init()
915 config->tx_dma.base), true); in flexcomm_uart_async_init()
919 /* Init work objects for RX and TX timeouts */ in flexcomm_uart_async_init()
920 k_work_init_delayable(&data->tx_data.timeout_work, in flexcomm_uart_async_init()
921 config->tx_timeout_func); in flexcomm_uart_async_init()
922 k_work_init_delayable(&data->rx_data.timeout_work, in flexcomm_uart_async_init()
923 config->rx_timeout_func); in flexcomm_uart_async_init()
933 struct mcux_flexcomm_data *data = dev->data; in mcux_flexcomm_isr()
936 if (data->irq_callback) { in mcux_flexcomm_isr()
937 data->irq_callback(dev, data->irq_cb_data); in mcux_flexcomm_isr()
942 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_isr()
945 if (data->async_callback) { in mcux_flexcomm_isr()
947 /* Handle RX interrupt (START bit detected) in mcux_flexcomm_isr()
948 * RX interrupt defeats the purpose of UART ASYNC API in mcux_flexcomm_isr()
952 * Zephyr's RX ASYNC API. However, if not using the RX in mcux_flexcomm_isr()
956 if (config->base->INTSTAT & USART_INTSTAT_START_MASK) { in mcux_flexcomm_isr()
960 * rx data now. If timeout is forever, don't do anything. in mcux_flexcomm_isr()
962 if (data->rx_data.timeout == 0) { in mcux_flexcomm_isr()
964 } else if (data->rx_data.timeout != SYS_FOREVER_US) { in mcux_flexcomm_isr()
965 k_work_reschedule(&data->rx_data.timeout_work, in mcux_flexcomm_isr()
966 K_USEC(data->rx_data.timeout)); in mcux_flexcomm_isr()
970 config->base->STAT |= USART_STAT_START_MASK; in mcux_flexcomm_isr()
977 * because DMA filling TX fifo is faster than transmitter rate in mcux_flexcomm_isr()
979 if (config->base->FIFOINTSTAT & USART_FIFOINTSTAT_TXLVL_MASK) { in mcux_flexcomm_isr()
982 config->base->FIFOINTENCLR = USART_FIFOINTENCLR_TXLVL_MASK; in mcux_flexcomm_isr()
987 .data.tx.buf = data->tx_data.xfer_buf, in mcux_flexcomm_isr()
988 .data.tx.len = data->tx_data.xfer_len, in mcux_flexcomm_isr()
992 data->tx_data.xfer_len = 0; in mcux_flexcomm_isr()
993 data->tx_data.xfer_buf = NULL; in mcux_flexcomm_isr()
1006 const struct mcux_flexcomm_config *config = dev->config; in mcux_flexcomm_init()
1008 struct mcux_flexcomm_data *data = dev->data; in mcux_flexcomm_init()
1009 struct uart_config *cfg = &data->uart_config; in mcux_flexcomm_init()
1016 err = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT); in mcux_flexcomm_init()
1021 if (!device_is_ready(config->clock_dev)) { in mcux_flexcomm_init()
1022 return -ENODEV; in mcux_flexcomm_init()
1026 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_flexcomm_init()
1028 return -EINVAL; in mcux_flexcomm_init()
1031 if (config->parity == UART_CFG_PARITY_ODD) { in mcux_flexcomm_init()
1033 } else if (config->parity == UART_CFG_PARITY_EVEN) { in mcux_flexcomm_init()
1043 usart_config.baudRate_Bps = config->baud_rate; in mcux_flexcomm_init()
1046 cfg->baudrate = config->baud_rate; in mcux_flexcomm_init()
1047 cfg->parity = config->parity; in mcux_flexcomm_init()
1049 cfg->stop_bits = UART_CFG_STOP_BITS_1; in mcux_flexcomm_init()
1050 cfg->data_bits = UART_CFG_DATA_BITS_8; in mcux_flexcomm_init()
1051 cfg->flow_ctrl = UART_CFG_FLOW_CTRL_NONE; in mcux_flexcomm_init()
1054 USART_Init(config->base, &usart_config, clock_freq); in mcux_flexcomm_init()
1057 config->irq_config_func(dev); in mcux_flexcomm_init()
1140 .channel = DT_INST_DMAS_CELL_BY_NAME(n, tx, channel), \
1159 .dev = DEVICE_DT_GET(DT_INST_DMAS_CTLR_BY_NAME(n, rx)), \
1160 .channel = DT_INST_DMAS_CELL_BY_NAME(n, rx, channel), \
1176 DT_REG_ADDR(DT_INST_DMAS_CTLR_BY_NAME(n, rx)), \