Lines Matching +full:pclk +full:- +full:pin
4 * SPDX-License-Identifier: Apache-2.0
19 const struct lpc11u6x_uart0_config *cfg = dev->config; in lpc11u6x_uart0_poll_in()
21 if (!(cfg->uart0->lsr & LPC11U6X_UART0_LSR_RDR)) { in lpc11u6x_uart0_poll_in()
22 return -1; in lpc11u6x_uart0_poll_in()
24 *c = cfg->uart0->rbr; in lpc11u6x_uart0_poll_in()
31 const struct lpc11u6x_uart0_config *cfg = dev->config; in lpc11u6x_uart0_poll_out()
33 while (!(cfg->uart0->lsr & LPC11U6X_UART0_LSR_THRE)) { in lpc11u6x_uart0_poll_out()
35 cfg->uart0->thr = c; in lpc11u6x_uart0_poll_out()
40 const struct lpc11u6x_uart0_config *cfg = dev->config; in lpc11u6x_uart0_err_check()
44 lsr = cfg->uart0->lsr; in lpc11u6x_uart0_err_check()
65 uart0->lcr |= LPC11U6X_UART0_LCR_DLAB; in lpc11u6x_uart0_write_divisor()
66 uart0->dll = div & 0xFF; in lpc11u6x_uart0_write_divisor()
67 uart0->dlm = (div >> 8) & 0xFF; in lpc11u6x_uart0_write_divisor()
68 uart0->lcr &= ~LPC11U6X_UART0_LCR_DLAB; in lpc11u6x_uart0_write_divisor()
74 uart0->fdr = (div & 0xF) | ((mul & 0xF) << 4); in lpc11u6x_uart0_write_fdr()
82 uint32_t pclk; in lpc11u6x_uart0_config_baudrate() local
89 clock_control_get_rate(clk_drv, (clock_control_subsys_t) cfg->clkid, in lpc11u6x_uart0_config_baudrate()
90 &pclk); in lpc11u6x_uart0_config_baudrate()
91 mul = pclk / (pclk % LPC11U6X_UART0_CLK); in lpc11u6x_uart0_config_baudrate()
93 dl = pclk / (16 * baudrate + 16 * baudrate / mul); in lpc11u6x_uart0_config_baudrate()
96 lpc11u6x_uart0_write_divisor(cfg->uart0, dl); in lpc11u6x_uart0_config_baudrate()
97 lpc11u6x_uart0_write_fdr(cfg->uart0, div, mul); in lpc11u6x_uart0_config_baudrate()
104 const struct lpc11u6x_uart0_config *dev_cfg = dev->config; in lpc11u6x_uart0_configure()
105 struct lpc11u6x_uart0_data *data = dev->data; in lpc11u6x_uart0_configure()
109 if (cfg->baudrate % 9600) { in lpc11u6x_uart0_configure()
110 return -ENOTSUP; in lpc11u6x_uart0_configure()
113 switch (cfg->parity) { in lpc11u6x_uart0_configure()
127 return -ENOTSUP; in lpc11u6x_uart0_configure()
129 return -EINVAL; in lpc11u6x_uart0_configure()
132 switch (cfg->stop_bits) { in lpc11u6x_uart0_configure()
134 return -ENOTSUP; in lpc11u6x_uart0_configure()
139 return -ENOTSUP; in lpc11u6x_uart0_configure()
144 return -EINVAL; in lpc11u6x_uart0_configure()
147 switch (cfg->data_bits) { in lpc11u6x_uart0_configure()
161 return -ENOTSUP; in lpc11u6x_uart0_configure()
163 return -EINVAL; in lpc11u6x_uart0_configure()
166 if (cfg->flow_ctrl != UART_CFG_FLOW_CTRL_NONE) { in lpc11u6x_uart0_configure()
167 return -ENOTSUP; in lpc11u6x_uart0_configure()
170 lpc11u6x_uart0_config_baudrate(dev_cfg->clock_dev, dev_cfg, cfg->baudrate); in lpc11u6x_uart0_configure()
171 dev_cfg->uart0->lcr = flags; in lpc11u6x_uart0_configure()
173 data->baudrate = cfg->baudrate; in lpc11u6x_uart0_configure()
174 data->stop_bits = cfg->stop_bits; in lpc11u6x_uart0_configure()
175 data->data_bits = cfg->data_bits; in lpc11u6x_uart0_configure()
176 data->flow_ctrl = cfg->flow_ctrl; in lpc11u6x_uart0_configure()
177 data->parity = cfg->parity; in lpc11u6x_uart0_configure()
185 struct lpc11u6x_uart0_data *data = dev->data; in lpc11u6x_uart0_config_get()
187 cfg->baudrate = data->baudrate; in lpc11u6x_uart0_config_get()
188 cfg->parity = data->parity; in lpc11u6x_uart0_config_get()
189 cfg->stop_bits = data->stop_bits; in lpc11u6x_uart0_config_get()
190 cfg->data_bits = data->data_bits; in lpc11u6x_uart0_config_get()
191 cfg->flow_ctrl = data->flow_ctrl; in lpc11u6x_uart0_config_get()
202 const struct lpc11u6x_uart0_config *cfg = dev->config; in lpc11u6x_uart0_fifo_fill()
205 while (nr_sent < size && (cfg->uart0->lsr & LPC11U6X_UART0_LSR_THRE)) { in lpc11u6x_uart0_fifo_fill()
206 cfg->uart0->thr = data[nr_sent++]; in lpc11u6x_uart0_fifo_fill()
215 const struct lpc11u6x_uart0_config *cfg = dev->config; in lpc11u6x_uart0_fifo_read()
218 while (nr_rx < size && (cfg->uart0->lsr & LPC11U6X_UART0_LSR_RDR)) { in lpc11u6x_uart0_fifo_read()
219 data[nr_rx++] = cfg->uart0->rbr; in lpc11u6x_uart0_fifo_read()
227 const struct lpc11u6x_uart0_config *cfg = dev->config; in lpc11u6x_uart0_irq_tx_enable()
229 cfg->uart0->ier = (cfg->uart0->ier & LPC11U6X_UART0_IER_MASK) | in lpc11u6x_uart0_irq_tx_enable()
240 const struct lpc11u6x_uart0_config *cfg = dev->config; in lpc11u6x_uart0_irq_tx_disable()
242 cfg->uart0->ier = (cfg->uart0->ier & LPC11U6X_UART0_IER_MASK) & in lpc11u6x_uart0_irq_tx_disable()
248 const struct lpc11u6x_uart0_config *cfg = dev->config; in lpc11u6x_uart0_irq_tx_complete()
250 return (cfg->uart0->lsr & LPC11U6X_UART0_LSR_TEMT) != 0; in lpc11u6x_uart0_irq_tx_complete()
255 const struct lpc11u6x_uart0_config *cfg = dev->config; in lpc11u6x_uart0_irq_tx_ready()
257 return (cfg->uart0->lsr & LPC11U6X_UART0_LSR_THRE) && in lpc11u6x_uart0_irq_tx_ready()
258 (cfg->uart0->ier & LPC11U6X_UART0_IER_THREINTEN); in lpc11u6x_uart0_irq_tx_ready()
263 const struct lpc11u6x_uart0_config *cfg = dev->config; in lpc11u6x_uart0_irq_rx_enable()
265 cfg->uart0->ier = (cfg->uart0->ier & LPC11U6X_UART0_IER_MASK) | in lpc11u6x_uart0_irq_rx_enable()
271 const struct lpc11u6x_uart0_config *cfg = dev->config; in lpc11u6x_uart0_irq_rx_disable()
273 cfg->uart0->ier = (cfg->uart0->ier & LPC11U6X_UART0_IER_MASK) & in lpc11u6x_uart0_irq_rx_disable()
279 struct lpc11u6x_uart0_data *data = dev->data; in lpc11u6x_uart0_irq_rx_ready()
281 return (LPC11U6X_UART0_IIR_INTID(data->cached_iir) == in lpc11u6x_uart0_irq_rx_ready()
283 (LPC11U6X_UART0_IIR_INTID(data->cached_iir) == in lpc11u6x_uart0_irq_rx_ready()
289 const struct lpc11u6x_uart0_config *cfg = dev->config; in lpc11u6x_uart0_irq_err_enable()
291 cfg->uart0->ier = (cfg->uart0->ier & LPC11U6X_UART0_IER_MASK) | in lpc11u6x_uart0_irq_err_enable()
297 const struct lpc11u6x_uart0_config *cfg = dev->config; in lpc11u6x_uart0_irq_err_disable()
299 cfg->uart0->ier = (cfg->uart0->ier & LPC11U6X_UART0_IER_MASK) & in lpc11u6x_uart0_irq_err_disable()
305 struct lpc11u6x_uart0_data *data = dev->data; in lpc11u6x_uart0_irq_is_pending()
307 return !(data->cached_iir & LPC11U6X_UART0_IIR_STATUS); in lpc11u6x_uart0_irq_is_pending()
312 const struct lpc11u6x_uart0_config *cfg = dev->config; in lpc11u6x_uart0_irq_update()
313 struct lpc11u6x_uart0_data *data = dev->data; in lpc11u6x_uart0_irq_update()
315 data->cached_iir = cfg->uart0->iir; in lpc11u6x_uart0_irq_update()
323 struct lpc11u6x_uart0_data *data = dev->data; in lpc11u6x_uart0_irq_callback_set()
325 data->cb = cb; in lpc11u6x_uart0_irq_callback_set()
326 data->cb_data = user_data; in lpc11u6x_uart0_irq_callback_set()
331 struct lpc11u6x_uart0_data *data = dev->data; in lpc11u6x_uart0_isr()
333 if (data->cb) { in lpc11u6x_uart0_isr()
334 data->cb(dev, data->cb_data); in lpc11u6x_uart0_isr()
341 const struct lpc11u6x_uart0_config *cfg = dev->config; in lpc11u6x_uart0_init()
342 struct lpc11u6x_uart0_data *data = dev->data; in lpc11u6x_uart0_init()
345 /* Apply default pin control state to select RX and TX pins */ in lpc11u6x_uart0_init()
346 err = pinctrl_apply_state(cfg->pincfg, PINCTRL_STATE_DEFAULT); in lpc11u6x_uart0_init()
351 if (!device_is_ready(cfg->clock_dev)) { in lpc11u6x_uart0_init()
352 return -ENODEV; in lpc11u6x_uart0_init()
355 clock_control_on(cfg->clock_dev, (clock_control_subsys_t) cfg->clkid); in lpc11u6x_uart0_init()
358 lpc11u6x_uart0_config_baudrate(cfg->clock_dev, cfg, cfg->baudrate); in lpc11u6x_uart0_init()
360 cfg->uart0->lcr |= LPC11U6X_UART0_LCR_WLS_8BITS; /* 8N1 */ in lpc11u6x_uart0_init()
362 data->baudrate = cfg->baudrate; in lpc11u6x_uart0_init()
363 data->parity = UART_CFG_PARITY_NONE; in lpc11u6x_uart0_init()
364 data->stop_bits = UART_CFG_STOP_BITS_1; in lpc11u6x_uart0_init()
365 data->data_bits = UART_CFG_DATA_BITS_8; in lpc11u6x_uart0_init()
366 data->flow_ctrl = UART_CFG_FLOW_CTRL_NONE; in lpc11u6x_uart0_init()
369 cfg->uart0->fcr = LPC11U6X_UART0_FCR_FIFO_EN; in lpc11u6x_uart0_init()
372 cfg->irq_config_func(dev); in lpc11u6x_uart0_init()
384 "rx-invert not supported for UART0");
386 "tx-invert not supported for UART0");
455 const struct lpc11u6x_uartx_config *cfg = dev->config; in lpc11u6x_uartx_poll_in()
457 if (!(cfg->base->stat & LPC11U6X_UARTX_STAT_RXRDY)) { in lpc11u6x_uartx_poll_in()
458 return -1; in lpc11u6x_uartx_poll_in()
460 *c = cfg->base->rx_dat; in lpc11u6x_uartx_poll_in()
466 const struct lpc11u6x_uartx_config *cfg = dev->config; in lpc11u6x_uartx_poll_out()
468 while (!(cfg->base->stat & LPC11U6X_UARTX_STAT_TXRDY)) { in lpc11u6x_uartx_poll_out()
470 cfg->base->tx_dat = c; in lpc11u6x_uartx_poll_out()
475 const struct lpc11u6x_uartx_config *cfg = dev->config; in lpc11u6x_uartx_err_check()
478 if (cfg->base->stat & LPC11U6X_UARTX_STAT_OVERRUNINT) { in lpc11u6x_uartx_err_check()
481 if (cfg->base->stat & LPC11U6X_UARTX_STAT_FRAMERRINT) { in lpc11u6x_uartx_err_check()
484 if (cfg->base->stat & LPC11U6X_UARTX_STAT_PARITYERRINT) { in lpc11u6x_uartx_err_check()
496 const struct device *clk_drv = cfg->clock_dev; in lpc11u6x_uartx_config_baud()
498 clock_control_get_rate(clk_drv, (clock_control_subsys_t) cfg->clkid, in lpc11u6x_uartx_config_baud()
503 div -= 1; in lpc11u6x_uartx_config_baud()
505 cfg->base->brg = div & LPC11U6X_UARTX_BRG_MASK; in lpc11u6x_uartx_config_baud()
512 const struct lpc11u6x_uartx_config *dev_cfg = dev->config; in lpc11u6x_uartx_configure()
513 struct lpc11u6x_uartx_data *data = dev->data; in lpc11u6x_uartx_configure()
517 if (cfg->baudrate % 9600) { in lpc11u6x_uartx_configure()
518 return -ENOTSUP; in lpc11u6x_uartx_configure()
521 switch (cfg->parity) { in lpc11u6x_uartx_configure()
534 return -ENOTSUP; in lpc11u6x_uartx_configure()
536 return -EINVAL; in lpc11u6x_uartx_configure()
539 switch (cfg->stop_bits) { in lpc11u6x_uartx_configure()
541 return -ENOTSUP; in lpc11u6x_uartx_configure()
546 return -ENOTSUP; in lpc11u6x_uartx_configure()
551 return -EINVAL; in lpc11u6x_uartx_configure()
554 switch (cfg->data_bits) { in lpc11u6x_uartx_configure()
558 return -ENOTSUP; in lpc11u6x_uartx_configure()
569 return -EINVAL; in lpc11u6x_uartx_configure()
572 if (cfg->flow_ctrl != UART_CFG_FLOW_CTRL_NONE) { in lpc11u6x_uartx_configure()
573 return -ENOTSUP; in lpc11u6x_uartx_configure()
576 if (dev_cfg->rx_invert) { in lpc11u6x_uartx_configure()
579 if (dev_cfg->tx_invert) { in lpc11u6x_uartx_configure()
584 dev_cfg->base->cfg = 0; in lpc11u6x_uartx_configure()
587 lpc11u6x_uartx_config_baud(dev_cfg, cfg->baudrate); in lpc11u6x_uartx_configure()
589 /* Set parity, data bits, stop bits and re-enable UART interface */ in lpc11u6x_uartx_configure()
590 dev_cfg->base->cfg = flags | LPC11U6X_UARTX_CFG_ENABLE; in lpc11u6x_uartx_configure()
592 data->baudrate = cfg->baudrate; in lpc11u6x_uartx_configure()
593 data->parity = cfg->parity; in lpc11u6x_uartx_configure()
594 data->stop_bits = cfg->stop_bits; in lpc11u6x_uartx_configure()
595 data->data_bits = cfg->data_bits; in lpc11u6x_uartx_configure()
596 data->flow_ctrl = cfg->flow_ctrl; in lpc11u6x_uartx_configure()
604 const struct lpc11u6x_uartx_data *data = dev->data; in lpc11u6x_uartx_config_get()
606 cfg->baudrate = data->baudrate; in lpc11u6x_uartx_config_get()
607 cfg->parity = data->parity; in lpc11u6x_uartx_config_get()
608 cfg->stop_bits = data->stop_bits; in lpc11u6x_uartx_config_get()
609 cfg->data_bits = data->data_bits; in lpc11u6x_uartx_config_get()
610 cfg->flow_ctrl = data->flow_ctrl; in lpc11u6x_uartx_config_get()
621 const struct lpc11u6x_uartx_config *cfg = dev->config; in lpc11u6x_uartx_fifo_fill()
625 (cfg->base->stat & LPC11U6X_UARTX_STAT_TXRDY)) { in lpc11u6x_uartx_fifo_fill()
626 cfg->base->tx_dat = data[tx_size++]; in lpc11u6x_uartx_fifo_fill()
634 const struct lpc11u6x_uartx_config *cfg = dev->config; in lpc11u6x_uartx_fifo_read()
638 (cfg->base->stat & LPC11U6X_UARTX_STAT_RXRDY)) { in lpc11u6x_uartx_fifo_read()
639 data[rx_size++] = cfg->base->rx_dat; in lpc11u6x_uartx_fifo_read()
646 const struct lpc11u6x_uartx_config *cfg = dev->config; in lpc11u6x_uartx_irq_tx_enable()
648 cfg->base->int_en_set = (cfg->base->int_en_set & in lpc11u6x_uartx_irq_tx_enable()
655 const struct lpc11u6x_uartx_config *cfg = dev->config; in lpc11u6x_uartx_irq_tx_disable()
657 cfg->base->int_en_clr = LPC11U6X_UARTX_INT_EN_CLR_TXRDYCLR; in lpc11u6x_uartx_irq_tx_disable()
662 const struct lpc11u6x_uartx_config *cfg = dev->config; in lpc11u6x_uartx_irq_tx_ready()
664 return (cfg->base->stat & LPC11U6X_UARTX_STAT_TXRDY) && in lpc11u6x_uartx_irq_tx_ready()
665 (cfg->base->int_en_set & LPC11U6X_UARTX_INT_EN_SET_TXRDYEN); in lpc11u6x_uartx_irq_tx_ready()
670 const struct lpc11u6x_uartx_config *cfg = dev->config; in lpc11u6x_uartx_irq_tx_complete()
672 return (cfg->base->stat & LPC11U6X_UARTX_STAT_TXIDLE) != 0; in lpc11u6x_uartx_irq_tx_complete()
677 const struct lpc11u6x_uartx_config *cfg = dev->config; in lpc11u6x_uartx_irq_rx_enable()
679 cfg->base->int_en_set = (cfg->base->int_en_set & in lpc11u6x_uartx_irq_rx_enable()
686 const struct lpc11u6x_uartx_config *cfg = dev->config; in lpc11u6x_uartx_irq_rx_disable()
688 cfg->base->int_en_clr = LPC11U6X_UARTX_INT_EN_CLR_RXRDYCLR; in lpc11u6x_uartx_irq_rx_disable()
693 const struct lpc11u6x_uartx_config *cfg = dev->config; in lpc11u6x_uartx_irq_rx_ready()
695 return (cfg->base->stat & LPC11U6X_UARTX_STAT_RXRDY) && in lpc11u6x_uartx_irq_rx_ready()
696 (cfg->base->int_en_set & LPC11U6X_UARTX_INT_EN_SET_RXRDYEN); in lpc11u6x_uartx_irq_rx_ready()
701 const struct lpc11u6x_uartx_config *cfg = dev->config; in lpc11u6x_uartx_irq_err_enable()
703 cfg->base->int_en_set = (cfg->base->int_en_set & in lpc11u6x_uartx_irq_err_enable()
712 const struct lpc11u6x_uartx_config *cfg = dev->config; in lpc11u6x_uartx_irq_err_disable()
714 cfg->base->int_en_clr = LPC11U6X_UARTX_INT_EN_CLR_OVERRUNCLR | in lpc11u6x_uartx_irq_err_disable()
721 const struct lpc11u6x_uartx_config *cfg = dev->config; in lpc11u6x_uartx_irq_is_pending()
723 if ((cfg->base->stat & LPC11U6X_UARTX_STAT_RXRDY) && in lpc11u6x_uartx_irq_is_pending()
724 (cfg->base->int_stat & LPC11U6X_UARTX_INT_STAT_RXRDY)) { in lpc11u6x_uartx_irq_is_pending()
727 if ((cfg->base->stat & LPC11U6X_UARTX_STAT_TXRDY) && in lpc11u6x_uartx_irq_is_pending()
728 cfg->base->int_stat & LPC11U6X_UARTX_INT_STAT_TXRDY) { in lpc11u6x_uartx_irq_is_pending()
731 if (cfg->base->stat & (LPC11U6X_UARTX_STAT_OVERRUNINT | in lpc11u6x_uartx_irq_is_pending()
748 struct lpc11u6x_uartx_data *data = dev->data; in lpc11u6x_uartx_irq_callback_set()
750 data->cb = cb; in lpc11u6x_uartx_irq_callback_set()
751 data->cb_data = user_data; in lpc11u6x_uartx_irq_callback_set()
756 struct lpc11u6x_uartx_data *data = dev->data; in lpc11u6x_uartx_isr()
758 if (data->cb) { in lpc11u6x_uartx_isr()
759 data->cb(dev, data->cb_data); in lpc11u6x_uartx_isr()
769 for (i = 0; i < ARRAY_SIZE(shared_irq->devices); i++) { in lpc11u6x_uartx_shared_isr()
770 if (shared_irq->devices[i]) { in lpc11u6x_uartx_shared_isr()
771 lpc11u6x_uartx_isr(shared_irq->devices[i]); in lpc11u6x_uartx_shared_isr()
779 const struct lpc11u6x_uartx_config *cfg = dev->config; in lpc11u6x_uartx_init()
780 struct lpc11u6x_uartx_data *data = dev->data; in lpc11u6x_uartx_init()
783 /* Apply default pin control state to select RX and TX pins */ in lpc11u6x_uartx_init()
784 err = pinctrl_apply_state(cfg->pincfg, PINCTRL_STATE_DEFAULT); in lpc11u6x_uartx_init()
789 clock_control_on(cfg->clock_dev, (clock_control_subsys_t) cfg->clkid); in lpc11u6x_uartx_init()
792 lpc11u6x_uartx_config_baud(cfg, cfg->baudrate); in lpc11u6x_uartx_init()
793 cfg->base->cfg = LPC11U6X_UARTX_CFG_DATALEN_8BIT; /* 8N1 */ in lpc11u6x_uartx_init()
795 data->baudrate = cfg->baudrate; in lpc11u6x_uartx_init()
796 data->parity = UART_CFG_PARITY_NONE; in lpc11u6x_uartx_init()
797 data->stop_bits = UART_CFG_STOP_BITS_1; in lpc11u6x_uartx_init()
798 data->data_bits = UART_CFG_DATA_BITS_8; in lpc11u6x_uartx_init()
799 data->flow_ctrl = UART_CFG_FLOW_CTRL_NONE; in lpc11u6x_uartx_init()
801 if (cfg->rx_invert) { in lpc11u6x_uartx_init()
802 cfg->base->cfg |= LPC11U6X_UARTX_CFG_RXPOL(1); in lpc11u6x_uartx_init()
804 if (cfg->tx_invert) { in lpc11u6x_uartx_init()
805 cfg->base->cfg |= LPC11U6X_UARTX_CFG_TXPOL(1); in lpc11u6x_uartx_init()
809 cfg->base->cfg = (cfg->base->cfg & LPC11U6X_UARTX_CFG_MASK) | in lpc11u6x_uartx_init()