Lines Matching +full:fixed +full:- +full:baudrate
4 * SPDX-License-Identifier: Apache-2.0
64 * indicate that the device has a fixed baud rate; i.e. if this flag is set
121 * This is a non-blocking function.
134 * @return 0 if a character arrived, -1 if input buffer is empty.
135 * -EINVAL if p_char is null pointer
139 const struct uart_intel_lw_device_config *config = dev->config; in uart_intel_lw_poll_in()
140 struct uart_intel_lw_device_data *data = dev->data; in uart_intel_lw_poll_in()
141 int ret_val = -1; in uart_intel_lw_poll_in()
149 return -EINVAL; in uart_intel_lw_poll_in()
152 k_spinlock_key_t key = k_spin_lock(&data->lock); in uart_intel_lw_poll_in()
155 status = sys_read32(config->base + INTEL_LW_UART_STATUS_REG_OFFSET); in uart_intel_lw_poll_in()
158 *p_char = sys_read32(config->base + INTEL_LW_UART_RXDATA_REG_OFFSET); in uart_intel_lw_poll_in()
162 k_spin_unlock(&data->lock, key); in uart_intel_lw_poll_in()
192 const struct uart_intel_lw_device_config *config = dev->config; in uart_intel_lw_poll_out()
193 struct uart_intel_lw_device_data *data = dev->data; in uart_intel_lw_poll_out()
201 key = k_spin_lock(&data->lock); in uart_intel_lw_poll_out()
204 status = sys_read32(config->base + INTEL_LW_UART_STATUS_REG_OFFSET); in uart_intel_lw_poll_out()
209 data->control_val |= INTEL_LW_UART_CONTROL_RTS_MSK; in uart_intel_lw_poll_out()
210 sys_write32(data->control_val, config->base in uart_intel_lw_poll_out()
213 sys_write32(c, config->base + INTEL_LW_UART_TXDATA_REG_OFFSET); in uart_intel_lw_poll_out()
217 status = sys_read32(config->base + INTEL_LW_UART_STATUS_REG_OFFSET); in uart_intel_lw_poll_out()
222 data->control_val &= ~INTEL_LW_UART_CONTROL_RTS_MSK; in uart_intel_lw_poll_out()
223 sys_write32(data->control_val, config->base in uart_intel_lw_poll_out()
230 k_spin_unlock(&data->lock, key); in uart_intel_lw_poll_out()
246 struct uart_intel_lw_device_data *data = dev->data; in uart_intel_lw_init()
247 const struct uart_intel_lw_device_config *config = dev->config; in uart_intel_lw_init()
249 sys_write32(INTEL_LW_UART_CLEAR_STATUS_VAL, config->base in uart_intel_lw_init()
257 config->irq_config_func(dev); in uart_intel_lw_init()
261 data->control_val = INTEL_LW_UART_CONTROL_DCTS_MSK; in uart_intel_lw_init()
264 sys_write32(data->control_val, config->base + INTEL_LW_UART_CONTROL_REG_OFFSET); in uart_intel_lw_init()
285 struct uart_intel_lw_device_data *data = dev->data; in uart_intel_lw_err_check()
289 const struct uart_intel_lw_device_config *config = dev->config; in uart_intel_lw_err_check()
290 k_spinlock_key_t key = k_spin_lock(&data->lock); in uart_intel_lw_err_check()
292 data->status_act = sys_read32(config->base + INTEL_LW_UART_STATUS_REG_OFFSET); in uart_intel_lw_err_check()
295 if (data->status_act & INTEL_LW_UART_STATUS_E_MSK) { in uart_intel_lw_err_check()
296 if (data->status_act & INTEL_LW_UART_STATUS_PE_MSK) { in uart_intel_lw_err_check()
300 if (data->status_act & INTEL_LW_UART_STATUS_FE_MSK) { in uart_intel_lw_err_check()
304 if (data->status_act & INTEL_LW_UART_STATUS_BRK_MSK) { in uart_intel_lw_err_check()
308 if (data->status_act & INTEL_LW_UART_STATUS_ROE_MSK) { in uart_intel_lw_err_check()
315 sys_write32(INTEL_LW_UART_CLEAR_STATUS_VAL, config->base in uart_intel_lw_err_check()
317 k_spin_unlock(&data->lock, key); in uart_intel_lw_err_check()
326 * The only parameter that can be changed during runtime is the baudrate.
330 * @return true if parameter other than baudrate remains the same. otherwise, false.
337 if ((cfg_stored->parity == cfg_in->parity) in uart_intel_lw_check_configuration()
338 && (cfg_stored->stop_bits == cfg_in->stop_bits) in uart_intel_lw_check_configuration()
339 && (cfg_stored->data_bits == cfg_in->data_bits) in uart_intel_lw_check_configuration()
340 && (cfg_stored->flow_ctrl == cfg_in->flow_ctrl)) { in uart_intel_lw_check_configuration()
353 * @return 0 if success, -ENOTSUP, if input from cfg_in is not configurable.
354 * -EINVAL if cfg_in is null pointer
359 const struct uart_intel_lw_device_config *config = dev->config; in uart_intel_lw_configure()
360 struct uart_intel_lw_device_data * const data = dev->data; in uart_intel_lw_configure()
361 struct uart_config * const cfg_stored = &data->uart_cfg; in uart_intel_lw_configure()
370 return -EINVAL; in uart_intel_lw_configure()
375 && !(config->flags & INTEL_LW_UART_FB)) { in uart_intel_lw_configure()
376 /* parameter is valid, just return ok if baudrate is the same. */ in uart_intel_lw_configure()
377 if (cfg_stored->baudrate != cfg_in->baudrate) { in uart_intel_lw_configure()
378 /* calculate and set baudrate. */ in uart_intel_lw_configure()
379 divisor_val = (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC/cfg_in->baudrate) - 1; in uart_intel_lw_configure()
380 sys_write32(divisor_val, config->base + INTEL_LW_UART_DIVISOR_REG_OFFSET); in uart_intel_lw_configure()
383 cfg_stored->baudrate = cfg_in->baudrate; in uart_intel_lw_configure()
389 ret_val = -ENOTSUP; in uart_intel_lw_configure()
403 * -EINVAL if cfg_out is null pointer
408 const struct uart_intel_lw_device_data *data = dev->data; in uart_intel_lw_config_get()
415 return -EINVAL; in uart_intel_lw_config_get()
418 *cfg_out = data->uart_cfg; in uart_intel_lw_config_get()
438 const struct uart_intel_lw_device_config *config = dev->config; in uart_intel_lw_fifo_fill()
439 struct uart_intel_lw_device_data *data = dev->data; in uart_intel_lw_fifo_fill()
452 if (data->control_val & INTEL_LW_UART_CONTROL_TRBK_MSK) { in uart_intel_lw_fifo_fill()
457 if (data->status_act & INTEL_LW_UART_STATUS_TRDY_MSK) { in uart_intel_lw_fifo_fill()
458 key = k_spin_lock(&data->lock); in uart_intel_lw_fifo_fill()
459 sys_write32(tx_data[ret_val++], config->base in uart_intel_lw_fifo_fill()
461 data->status_act = sys_read32(config->base in uart_intel_lw_fifo_fill()
463 k_spin_unlock(&data->lock, key); in uart_intel_lw_fifo_fill()
468 } while ((size - ret_val) > 0); in uart_intel_lw_fifo_fill()
487 const struct uart_intel_lw_device_config *config = dev->config; in uart_intel_lw_fifo_read()
488 struct uart_intel_lw_device_data *data = dev->data; in uart_intel_lw_fifo_read()
501 if (data->status_act & INTEL_LW_UART_STATUS_RRDY_MSK) { in uart_intel_lw_fifo_read()
502 key = k_spin_lock(&data->lock); in uart_intel_lw_fifo_read()
503 rx_data[ret_val++] = sys_read32(config->base + in uart_intel_lw_fifo_read()
505 data->status_act = sys_read32(config->base in uart_intel_lw_fifo_read()
508 k_spin_unlock(&data->lock, key); in uart_intel_lw_fifo_read()
512 } while ((size - ret_val) > 0); in uart_intel_lw_fifo_read()
524 struct uart_intel_lw_device_data *data = dev->data; in uart_intel_lw_irq_tx_enable()
525 const struct uart_intel_lw_device_config *config = dev->config; in uart_intel_lw_irq_tx_enable()
527 k_spinlock_key_t key = k_spin_lock(&data->lock); in uart_intel_lw_irq_tx_enable()
529 data->control_val |= INTEL_LW_UART_CONTROL_TRDY_MSK; in uart_intel_lw_irq_tx_enable()
533 data->control_val |= INTEL_LW_UART_CONTROL_RTS_MSK; in uart_intel_lw_irq_tx_enable()
536 sys_write32(data->control_val, config->base + INTEL_LW_UART_CONTROL_REG_OFFSET); in uart_intel_lw_irq_tx_enable()
538 k_spin_unlock(&data->lock, key); in uart_intel_lw_irq_tx_enable()
548 struct uart_intel_lw_device_data *data = dev->data; in uart_intel_lw_irq_tx_disable()
549 const struct uart_intel_lw_device_config *config = dev->config; in uart_intel_lw_irq_tx_disable()
551 k_spinlock_key_t key = k_spin_lock(&data->lock); in uart_intel_lw_irq_tx_disable()
553 data->control_val &= ~INTEL_LW_UART_CONTROL_TRDY_MSK; in uart_intel_lw_irq_tx_disable()
557 data->control_val &= ~INTEL_LW_UART_CONTROL_RTS_MSK; in uart_intel_lw_irq_tx_disable()
560 sys_write32(data->control_val, config->base + INTEL_LW_UART_CONTROL_REG_OFFSET); in uart_intel_lw_irq_tx_disable()
562 k_spin_unlock(&data->lock, key); in uart_intel_lw_irq_tx_disable()
575 struct uart_intel_lw_device_data *data = dev->data; in uart_intel_lw_irq_tx_ready()
578 k_spinlock_key_t key = k_spin_lock(&data->lock); in uart_intel_lw_irq_tx_ready()
581 if (data->control_val & INTEL_LW_UART_CONTROL_TRDY_MSK) { in uart_intel_lw_irq_tx_ready()
583 if (data->status_act & INTEL_LW_UART_STATUS_TMT_MSK) { in uart_intel_lw_irq_tx_ready()
590 if ((data->status_act & INTEL_LW_UART_STATUS_CTS_MSK) == 0) { in uart_intel_lw_irq_tx_ready()
596 k_spin_unlock(&data->lock, key); in uart_intel_lw_irq_tx_ready()
610 struct uart_intel_lw_device_data *data = dev->data; in uart_intel_lw_irq_tx_complete()
613 k_spinlock_key_t key = k_spin_lock(&data->lock); in uart_intel_lw_irq_tx_complete()
615 if (data->status_act & INTEL_LW_UART_STATUS_TMT_MSK) { in uart_intel_lw_irq_tx_complete()
619 k_spin_unlock(&data->lock, key); in uart_intel_lw_irq_tx_complete()
631 struct uart_intel_lw_device_data *data = dev->data; in uart_intel_lw_irq_rx_enable()
632 const struct uart_intel_lw_device_config *config = dev->config; in uart_intel_lw_irq_rx_enable()
634 k_spinlock_key_t key = k_spin_lock(&data->lock); in uart_intel_lw_irq_rx_enable()
636 data->control_val |= INTEL_LW_UART_CONTROL_RRDY_MSK; in uart_intel_lw_irq_rx_enable()
637 sys_write32(data->control_val, config->base + INTEL_LW_UART_CONTROL_REG_OFFSET); in uart_intel_lw_irq_rx_enable()
639 k_spin_unlock(&data->lock, key); in uart_intel_lw_irq_rx_enable()
649 struct uart_intel_lw_device_data *data = dev->data; in uart_intel_lw_irq_rx_disable()
650 const struct uart_intel_lw_device_config *config = dev->config; in uart_intel_lw_irq_rx_disable()
652 k_spinlock_key_t key = k_spin_lock(&data->lock); in uart_intel_lw_irq_rx_disable()
654 data->control_val &= ~INTEL_LW_UART_CONTROL_RRDY_MSK; in uart_intel_lw_irq_rx_disable()
655 sys_write32(data->control_val, config->base + INTEL_LW_UART_CONTROL_REG_OFFSET); in uart_intel_lw_irq_rx_disable()
657 k_spin_unlock(&data->lock, key); in uart_intel_lw_irq_rx_disable()
669 struct uart_intel_lw_device_data *data = dev->data; in uart_intel_lw_irq_rx_ready()
672 k_spinlock_key_t key = k_spin_lock(&data->lock); in uart_intel_lw_irq_rx_ready()
675 if (data->control_val & INTEL_LW_UART_CONTROL_RRDY_MSK) { in uart_intel_lw_irq_rx_ready()
677 if (data->status_act & INTEL_LW_UART_STATUS_RRDY_MSK) { in uart_intel_lw_irq_rx_ready()
682 k_spin_unlock(&data->lock, key); in uart_intel_lw_irq_rx_ready()
696 struct uart_intel_lw_device_data *data = dev->data; in uart_intel_lw_irq_update()
697 const struct uart_intel_lw_device_config *config = dev->config; in uart_intel_lw_irq_update()
699 k_spinlock_key_t key = k_spin_lock(&data->lock); in uart_intel_lw_irq_update()
701 data->status_act = sys_read32(config->base + INTEL_LW_UART_STATUS_REG_OFFSET); in uart_intel_lw_irq_update()
703 k_spin_unlock(&data->lock, key); in uart_intel_lw_irq_update()
717 struct uart_intel_lw_device_data *data = dev->data; in uart_intel_lw_irq_is_pending()
720 k_spinlock_key_t key = k_spin_lock(&data->lock); in uart_intel_lw_irq_is_pending()
722 if (data->status_act & data->control_val & INTEL_LW_UART_PENDING_MASK) { in uart_intel_lw_irq_is_pending()
726 k_spin_unlock(&data->lock, key); in uart_intel_lw_irq_is_pending()
742 struct uart_intel_lw_device_data *data = dev->data; in uart_intel_lw_irq_callback_set()
744 k_spinlock_key_t key = k_spin_lock(&data->lock); in uart_intel_lw_irq_callback_set()
747 if (data->set_eop_cb) { in uart_intel_lw_irq_callback_set()
748 data->cb_eop = cb; in uart_intel_lw_irq_callback_set()
749 data->cb_data_eop = cb_data; in uart_intel_lw_irq_callback_set()
750 data->set_eop_cb = 0; in uart_intel_lw_irq_callback_set()
752 data->cb = cb; in uart_intel_lw_irq_callback_set()
753 data->cb_data = cb_data; in uart_intel_lw_irq_callback_set()
756 data->cb = cb; in uart_intel_lw_irq_callback_set()
757 data->cb_data = cb_data; in uart_intel_lw_irq_callback_set()
760 k_spin_unlock(&data->lock, key); in uart_intel_lw_irq_callback_set()
773 struct uart_intel_lw_device_data *data = dev->data; in uart_intel_lw_dcts_isr()
774 const struct uart_intel_lw_device_config *config = dev->config; in uart_intel_lw_dcts_isr()
776 k_spinlock_key_t key = k_spin_lock(&data->lock); in uart_intel_lw_dcts_isr()
779 if (data->status_act & INTEL_LW_UART_STATUS_CTS_MSK) { in uart_intel_lw_dcts_isr()
782 data->control_val |= INTEL_LW_UART_CONTROL_RTS_MSK; in uart_intel_lw_dcts_isr()
783 sys_write32(data->control_val, config->base in uart_intel_lw_dcts_isr()
787 if (data->status_act & INTEL_LW_UART_STATUS_TMT_MSK) { in uart_intel_lw_dcts_isr()
789 data->control_val &= ~INTEL_LW_UART_CONTROL_RTS_MSK; in uart_intel_lw_dcts_isr()
790 sys_write32(data->control_val, config->base in uart_intel_lw_dcts_isr()
795 k_spin_unlock(&data->lock, key); in uart_intel_lw_dcts_isr()
809 struct uart_intel_lw_device_data *data = dev->data; in uart_intel_lw_isr()
810 const struct uart_intel_lw_device_config *config = dev->config; in uart_intel_lw_isr()
812 uart_irq_callback_user_data_t callback = data->cb; in uart_intel_lw_isr()
815 callback(dev, data->cb_data); in uart_intel_lw_isr()
820 data->status_act = sys_read32(config->base + INTEL_LW_UART_STATUS_REG_OFFSET); in uart_intel_lw_isr()
821 if (data->status_act & INTEL_LW_UART_STATUS_EOP_MSK) { in uart_intel_lw_isr()
822 callback = data->cb_eop; in uart_intel_lw_isr()
824 callback(dev, data->cb_data_eop); in uart_intel_lw_isr()
830 data->status_act = sys_read32(config->base + INTEL_LW_UART_STATUS_REG_OFFSET); in uart_intel_lw_isr()
832 if (data->status_act & INTEL_LW_UART_STATUS_DCTS_MSK) { in uart_intel_lw_isr()
838 sys_write32(INTEL_LW_UART_CLEAR_STATUS_VAL, config->base in uart_intel_lw_isr()
855 struct uart_intel_lw_device_data *data = dev->data; in uart_intel_lw_drv_cmd()
856 const struct uart_intel_lw_device_config *config = dev->config; in uart_intel_lw_drv_cmd()
858 int ret_val = -ENOTSUP; in uart_intel_lw_drv_cmd()
859 k_spinlock_key_t key = k_spin_lock(&data->lock); in uart_intel_lw_drv_cmd()
865 data->control_val |= INTEL_LW_UART_CONTROL_EOP_MSK; in uart_intel_lw_drv_cmd()
866 sys_write32(data->control_val, config->base in uart_intel_lw_drv_cmd()
870 sys_write32((uint8_t) p, config->base + INTEL_LW_UART_EOP_REG_OFFSET); in uart_intel_lw_drv_cmd()
873 * to set data->cb_eop and data->cb_data_eop! in uart_intel_lw_drv_cmd()
875 data->set_eop_cb = 1; in uart_intel_lw_drv_cmd()
881 data->control_val &= ~INTEL_LW_UART_CONTROL_EOP_MSK; in uart_intel_lw_drv_cmd()
882 sys_write32(data->control_val, config->base in uart_intel_lw_drv_cmd()
886 data->cb_eop = NULL; in uart_intel_lw_drv_cmd()
887 data->cb_data_eop = NULL; in uart_intel_lw_drv_cmd()
894 data->control_val |= INTEL_LW_UART_CONTROL_TRBK_MSK; in uart_intel_lw_drv_cmd()
895 sys_write32(data->control_val, config->base in uart_intel_lw_drv_cmd()
902 data->control_val &= ~INTEL_LW_UART_CONTROL_TRBK_MSK; in uart_intel_lw_drv_cmd()
903 sys_write32(data->control_val, config->base in uart_intel_lw_drv_cmd()
910 data->control_val |= INTEL_LW_UART_CONTROL_RTS_MSK; in uart_intel_lw_drv_cmd()
911 sys_write32(data->control_val, config->base in uart_intel_lw_drv_cmd()
918 data->control_val &= ~INTEL_LW_UART_CONTROL_RTS_MSK; in uart_intel_lw_drv_cmd()
919 sys_write32(data->control_val, config->base in uart_intel_lw_drv_cmd()
925 ret_val = -ENOTSUP; in uart_intel_lw_drv_cmd()
929 k_spin_unlock(&data->lock, key); in uart_intel_lw_drv_cmd()
996 .baudrate = DT_INST_PROP(n, current_speed), \