Lines Matching +full:fill +full:- +full:level
5 * SPDX-License-Identifier: Apache-2.0
12 * - Uart ASYNC functionality is not implemented in current
75 /* Level triggers when at least one element is in FIFO */
79 /* Level triggers when half-fifo is half empty */
80 .txFifoTriggerLevel = (CY_SCB_FIFO_SIZE / 2 - 1),
164 return -1; in _get_hw_block_num()
170 struct ifx_cat1_uart_data *data = dev->data; in ifx_cat1_uart_poll_in()
172 rec = cyhal_uart_getc(&data->obj, c, 0u); in ifx_cat1_uart_poll_in()
174 return ((rec == CY_SCB_UART_RX_NO_DATA) ? -1 : 0); in ifx_cat1_uart_poll_in()
179 struct ifx_cat1_uart_data *data = dev->data; in ifx_cat1_uart_poll_out()
181 (void) cyhal_uart_putc(&data->obj, (uint32_t)c); in ifx_cat1_uart_poll_out()
186 struct ifx_cat1_uart_data *data = dev->data; in ifx_cat1_uart_err_check()
187 uint32_t status = Cy_SCB_UART_GetRxFifoStatus(data->obj.base); in ifx_cat1_uart_err_check()
211 struct ifx_cat1_uart_data *data = dev->data; in ifx_cat1_uart_configure()
214 .data_bits = _convert_uart_data_bits_z_to_cyhal(cfg->data_bits), in ifx_cat1_uart_configure()
215 .stop_bits = _convert_uart_stop_bits_z_to_cyhal(cfg->stop_bits), in ifx_cat1_uart_configure()
216 .parity = _convert_uart_parity_z_to_cyhal(cfg->parity) in ifx_cat1_uart_configure()
220 data->cfg = *cfg; in ifx_cat1_uart_configure()
223 result = cyhal_uart_configure(&data->obj, &uart_cfg); in ifx_cat1_uart_configure()
227 result = cyhal_uart_set_baud(&data->obj, cfg->baudrate, NULL); in ifx_cat1_uart_configure()
231 data->obj.pin_cts = NC; in ifx_cat1_uart_configure()
232 data->obj.pin_rts = NC; in ifx_cat1_uart_configure()
235 if ((result == CY_RSLT_SUCCESS) && cfg->flow_ctrl) { in ifx_cat1_uart_configure()
236 Cy_SCB_UART_EnableCts(data->obj.base); in ifx_cat1_uart_configure()
239 return (result == CY_RSLT_SUCCESS) ? 0 : -ENOTSUP; in ifx_cat1_uart_configure()
247 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_config_get()
250 return -EINVAL; in ifx_cat1_uart_config_get()
253 *cfg = data->cfg; in ifx_cat1_uart_config_get()
265 struct ifx_cat1_uart_data *const data = dev->data; in _uart_event_callback_irq_mode()
267 if (data->irq_cb != NULL) { in _uart_event_callback_irq_mode()
268 data->irq_cb(dev, data->irq_cb_data); in _uart_event_callback_irq_mode()
272 /* Fill FIFO with data */
276 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_fifo_fill()
279 (void)cyhal_uart_write(&data->obj, (uint8_t *) tx_data, &_size); in ifx_cat1_uart_fifo_fill()
287 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_fifo_read()
290 (void)cyhal_uart_read(&data->obj, rx_data, &_size); in ifx_cat1_uart_fifo_read()
297 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_tx_enable()
298 const struct ifx_cat1_uart_config *const config = dev->config; in ifx_cat1_uart_irq_tx_enable()
300 cyhal_uart_enable_event(&data->obj, in ifx_cat1_uart_irq_tx_enable()
302 config->irq_priority, 1); in ifx_cat1_uart_irq_tx_enable()
308 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_tx_disable()
309 const struct ifx_cat1_uart_config *const config = dev->config; in ifx_cat1_uart_irq_tx_disable()
311 cyhal_uart_enable_event(&data->obj, in ifx_cat1_uart_irq_tx_disable()
313 config->irq_priority, 0); in ifx_cat1_uart_irq_tx_disable()
319 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_tx_ready()
320 uint32_t mask = Cy_SCB_GetTxInterruptStatusMasked(data->obj.base); in ifx_cat1_uart_irq_tx_ready()
328 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_tx_complete()
330 return (int) !(cyhal_uart_is_tx_active(&data->obj)); in ifx_cat1_uart_irq_tx_complete()
336 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_rx_enable()
337 const struct ifx_cat1_uart_config *const config = dev->config; in ifx_cat1_uart_irq_rx_enable()
339 cyhal_uart_enable_event(&data->obj, in ifx_cat1_uart_irq_rx_enable()
341 config->irq_priority, 1); in ifx_cat1_uart_irq_rx_enable()
347 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_rx_disable()
348 const struct ifx_cat1_uart_config *const config = dev->config; in ifx_cat1_uart_irq_rx_disable()
350 cyhal_uart_enable_event(&data->obj, in ifx_cat1_uart_irq_rx_disable()
352 config->irq_priority, 0); in ifx_cat1_uart_irq_rx_disable()
358 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_rx_ready()
360 return cyhal_uart_readable(&data->obj) ? 1 : 0; in ifx_cat1_uart_irq_rx_ready()
366 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_err_enable()
367 const struct ifx_cat1_uart_config *const config = dev->config; in ifx_cat1_uart_irq_err_enable()
369 cyhal_uart_enable_event(&data->obj, (cyhal_uart_event_t) in ifx_cat1_uart_irq_err_enable()
371 config->irq_priority, 1); in ifx_cat1_uart_irq_err_enable()
377 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_err_disable()
378 const struct ifx_cat1_uart_config *const config = dev->config; in ifx_cat1_uart_irq_err_disable()
380 cyhal_uart_enable_event(&data->obj, (cyhal_uart_event_t) in ifx_cat1_uart_irq_err_disable()
382 config->irq_priority, 0); in ifx_cat1_uart_irq_err_disable()
388 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_is_pending()
389 uint32_t intcause = Cy_SCB_GetInterruptCause(data->obj.base); in ifx_cat1_uart_irq_is_pending()
401 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_update()
405 (Cy_SCB_UART_GetNumInRxFifo(data->obj.base) == 0u)) { in ifx_cat1_uart_irq_update()
416 struct ifx_cat1_uart_data *data = dev->data; in ifx_cat1_uart_irq_callback_set()
417 cyhal_uart_t *uart_obj = &data->obj; in ifx_cat1_uart_irq_callback_set()
420 data->irq_cb = cb; in ifx_cat1_uart_irq_callback_set()
421 data->irq_cb_data = cb_data; in ifx_cat1_uart_irq_callback_set()
431 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_init()
432 const struct ifx_cat1_uart_config *const config = dev->config; in ifx_cat1_uart_init()
437 .resource = &data->hw_resource, in ifx_cat1_uart_init()
439 .clock = &data->clock, in ifx_cat1_uart_init()
448 data->hw_resource.type = CYHAL_RSC_SCB; in ifx_cat1_uart_init()
449 data->hw_resource.block_num = _get_hw_block_num(config->reg_addr); in ifx_cat1_uart_init()
452 ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); in ifx_cat1_uart_init()
458 result = _cyhal_utils_allocate_clock(&data->clock, &data->hw_resource, in ifx_cat1_uart_init()
461 return -ENOTSUP; in ifx_cat1_uart_init()
465 en_clk_dst_t clk_idx = _cyhal_scb_get_clock_index(uart_init_cfg.resource->block_num); in ifx_cat1_uart_init()
469 return -ENOTSUP; in ifx_cat1_uart_init()
473 result = cyhal_uart_init_cfg(&data->obj, &uart_init_cfg); in ifx_cat1_uart_init()
475 return -ENOTSUP; in ifx_cat1_uart_init()
479 data->obj.is_clock_owned = true; in ifx_cat1_uart_init()
480 ret = ifx_cat1_uart_configure(dev, &config->dt_cfg); in ifx_cat1_uart_init()