Lines Matching +full:fifo +full:- +full:gpios
5 * SPDX-License-Identifier: Apache-2.0
120 /* Level triggers when at least one element is in FIFO */
124 /* Level triggers when half-fifo is half empty */
125 .txFifoTriggerLevel = (CY_SCB_FIFO_SIZE / 2 - 1),
212 return -1; in _get_hw_block_num()
217 const struct ifx_cat1_uart_config *const config = dev->config; in ifx_cat1_uart_get_num_in_tx_fifo()
219 return Cy_SCB_GetNumInTxFifo(config->reg_addr); in ifx_cat1_uart_get_num_in_tx_fifo()
224 const struct ifx_cat1_uart_config *const config = dev->config; in ifx_cat1_uart_get_tx_active()
226 return Cy_SCB_GetTxSrValid(config->reg_addr) ? true : false; in ifx_cat1_uart_get_tx_active()
232 struct ifx_cat1_uart_data *data = dev->data; in ifx_cat1_uart_poll_in()
234 rec = cyhal_uart_getc(&data->obj, c, 0u); in ifx_cat1_uart_poll_in()
236 return ((rec == CY_SCB_UART_RX_NO_DATA) ? -1 : 0); in ifx_cat1_uart_poll_in()
241 struct ifx_cat1_uart_data *data = dev->data; in ifx_cat1_uart_poll_out()
243 (void)cyhal_uart_putc(&data->obj, (uint32_t)c); in ifx_cat1_uart_poll_out()
248 struct ifx_cat1_uart_data *data = dev->data; in ifx_cat1_uart_err_check()
249 uint32_t status = Cy_SCB_UART_GetRxFifoStatus(data->obj.base); in ifx_cat1_uart_err_check()
272 struct ifx_cat1_uart_data *data = dev->data; in ifx_cat1_uart_configure()
275 .data_bits = _convert_uart_data_bits_z_to_cyhal(cfg->data_bits), in ifx_cat1_uart_configure()
276 .stop_bits = _convert_uart_stop_bits_z_to_cyhal(cfg->stop_bits), in ifx_cat1_uart_configure()
277 .parity = _convert_uart_parity_z_to_cyhal(cfg->parity)}; in ifx_cat1_uart_configure()
280 data->cfg = *cfg; in ifx_cat1_uart_configure()
283 result = cyhal_uart_configure(&data->obj, &uart_cfg); in ifx_cat1_uart_configure()
287 result = cyhal_uart_set_baud(&data->obj, cfg->baudrate, NULL); in ifx_cat1_uart_configure()
291 data->obj.pin_cts = NC; in ifx_cat1_uart_configure()
292 data->obj.pin_rts = NC; in ifx_cat1_uart_configure()
295 if ((result == CY_RSLT_SUCCESS) && cfg->flow_ctrl) { in ifx_cat1_uart_configure()
296 result = cyhal_uart_enable_flow_control(&data->obj, true, true); in ifx_cat1_uart_configure()
299 return (result == CY_RSLT_SUCCESS) ? 0 : -ENOTSUP; in ifx_cat1_uart_configure()
306 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_config_get()
309 return -EINVAL; in ifx_cat1_uart_config_get()
312 *cfg = data->cfg; in ifx_cat1_uart_config_get()
324 struct ifx_cat1_uart_data *const data = dev->data; in _uart_event_callback_irq_mode()
326 if (data->irq_cb != NULL) { in _uart_event_callback_irq_mode()
327 data->irq_cb(dev, data->irq_cb_data); in _uart_event_callback_irq_mode()
331 /* Fill FIFO with data */
334 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_fifo_fill()
337 (void)cyhal_uart_write(&data->obj, (uint8_t *)tx_data, &_size); in ifx_cat1_uart_fifo_fill()
341 /* Read data from FIFO */
344 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_fifo_read()
347 (void)cyhal_uart_read(&data->obj, rx_data, &_size); in ifx_cat1_uart_fifo_read()
354 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_tx_enable()
355 const struct ifx_cat1_uart_config *const config = dev->config; in ifx_cat1_uart_irq_tx_enable()
357 cyhal_uart_enable_event(&data->obj, (cyhal_uart_event_t)CYHAL_UART_IRQ_TX_EMPTY, in ifx_cat1_uart_irq_tx_enable()
358 config->irq_priority, 1); in ifx_cat1_uart_irq_tx_enable()
364 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_tx_disable()
365 const struct ifx_cat1_uart_config *const config = dev->config; in ifx_cat1_uart_irq_tx_disable()
367 cyhal_uart_enable_event(&data->obj, (cyhal_uart_event_t)CYHAL_UART_IRQ_TX_EMPTY, in ifx_cat1_uart_irq_tx_disable()
368 config->irq_priority, 0); in ifx_cat1_uart_irq_tx_disable()
374 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_tx_ready()
375 uint32_t mask = Cy_SCB_GetTxInterruptStatusMasked(data->obj.base); in ifx_cat1_uart_irq_tx_ready()
383 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_tx_complete()
385 return (int)!(cyhal_uart_is_tx_active(&data->obj)); in ifx_cat1_uart_irq_tx_complete()
391 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_rx_enable()
392 const struct ifx_cat1_uart_config *const config = dev->config; in ifx_cat1_uart_irq_rx_enable()
394 cyhal_uart_enable_event(&data->obj, (cyhal_uart_event_t)CYHAL_UART_IRQ_RX_NOT_EMPTY, in ifx_cat1_uart_irq_rx_enable()
395 config->irq_priority, 1); in ifx_cat1_uart_irq_rx_enable()
401 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_rx_disable()
402 const struct ifx_cat1_uart_config *const config = dev->config; in ifx_cat1_uart_irq_rx_disable()
404 cyhal_uart_enable_event(&data->obj, (cyhal_uart_event_t)CYHAL_UART_IRQ_RX_NOT_EMPTY, in ifx_cat1_uart_irq_rx_disable()
405 config->irq_priority, 0); in ifx_cat1_uart_irq_rx_disable()
411 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_rx_ready()
413 return cyhal_uart_readable(&data->obj) ? 1 : 0; in ifx_cat1_uart_irq_rx_ready()
419 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_err_enable()
420 const struct ifx_cat1_uart_config *const config = dev->config; in ifx_cat1_uart_irq_err_enable()
423 &data->obj, (cyhal_uart_event_t)(CYHAL_UART_IRQ_TX_ERROR | CYHAL_UART_IRQ_RX_ERROR), in ifx_cat1_uart_irq_err_enable()
424 config->irq_priority, 1); in ifx_cat1_uart_irq_err_enable()
430 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_err_disable()
431 const struct ifx_cat1_uart_config *const config = dev->config; in ifx_cat1_uart_irq_err_disable()
434 &data->obj, (cyhal_uart_event_t)(CYHAL_UART_IRQ_TX_ERROR | CYHAL_UART_IRQ_RX_ERROR), in ifx_cat1_uart_irq_err_disable()
435 config->irq_priority, 0); in ifx_cat1_uart_irq_err_disable()
441 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_is_pending()
442 uint32_t intcause = Cy_SCB_GetInterruptCause(data->obj.base); in ifx_cat1_uart_irq_is_pending()
454 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_irq_update()
458 (Cy_SCB_UART_GetNumInRxFifo(data->obj.base) == 0u)) { in ifx_cat1_uart_irq_update()
468 struct ifx_cat1_uart_data *data = dev->data; in ifx_cat1_uart_irq_callback_set()
469 cyhal_uart_t *uart_obj = &data->obj; in ifx_cat1_uart_irq_callback_set()
472 data->irq_cb = cb; in ifx_cat1_uart_irq_callback_set()
473 data->irq_cb_data = cb_data; in ifx_cat1_uart_irq_callback_set()
485 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_async_callback_set()
487 data->async.cb = callback; in ifx_cat1_uart_async_callback_set()
488 data->async.user_data = user_data; in ifx_cat1_uart_async_callback_set()
489 data->async.dma_tx.dma_cfg.user_data = (void *)dev; in ifx_cat1_uart_async_callback_set()
498 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_async_dma_config_buffer()
499 struct ifx_cat1_dma_stream *dma_stream = tx ? &data->async.dma_tx : &data->async.dma_rx; in ifx_cat1_uart_async_dma_config_buffer()
502 dma_stream->blk_cfg.block_size = dma_stream->buf_len; in ifx_cat1_uart_async_dma_config_buffer()
505 dma_stream->blk_cfg.source_address = (uint32_t)dma_stream->buf; in ifx_cat1_uart_async_dma_config_buffer()
507 dma_stream->blk_cfg.dest_address = (uint32_t)dma_stream->buf; in ifx_cat1_uart_async_dma_config_buffer()
510 ret = dma_config(dma_stream->dev, dma_stream->dma_channel, &dma_stream->dma_cfg); in ifx_cat1_uart_async_dma_config_buffer()
513 ret = dma_start(dma_stream->dev, dma_stream->dma_channel); in ifx_cat1_uart_async_dma_config_buffer()
522 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_async_tx()
523 const struct device *dev_dma = data->async.dma_tx.dev; in ifx_cat1_uart_async_tx()
527 err = -ENODEV; in ifx_cat1_uart_async_tx()
532 err = -EINVAL; in ifx_cat1_uart_async_tx()
537 data->async.dma_tx.buf = (uint8_t *)tx_data; in ifx_cat1_uart_async_tx()
538 data->async.dma_tx.buf_len = tx_data_size; in ifx_cat1_uart_async_tx()
539 data->async.dma_tx.blk_cfg.block_size = 0; in ifx_cat1_uart_async_tx()
540 data->async.dma_tx.dma_transmitted_bytes = 0; in ifx_cat1_uart_async_tx()
551 k_work_reschedule(&data->async.dma_tx.timeout_work, K_USEC(timeout)); in ifx_cat1_uart_async_tx()
560 struct ifx_cat1_uart_data *data = dev->data; in ifx_cat1_uart_async_tx_abort()
566 k_work_cancel_delayable(&data->async.dma_tx.timeout_work); in ifx_cat1_uart_async_tx_abort()
568 err = dma_stop(data->async.dma_tx.dev, data->async.dma_tx.dma_channel); in ifx_cat1_uart_async_tx_abort()
574 err = dma_get_status(data->async.dma_tx.dev, data->async.dma_tx.dma_channel, &stat); in ifx_cat1_uart_async_tx_abort()
581 evt.data.tx.buf = data->async.dma_tx.buf; in ifx_cat1_uart_async_tx_abort()
584 if (data->async.cb) { in ifx_cat1_uart_async_tx_abort()
585 data->async.cb(dev, &evt, data->async.user_data); in ifx_cat1_uart_async_tx_abort()
597 struct ifx_cat1_uart_data *const data = uart_dev->data; in dma_callback_tx_done()
602 k_work_cancel_delayable(&data->async.dma_tx.timeout_work); in dma_callback_tx_done()
603 dma_stop(data->async.dma_tx.dev, data->async.dma_tx.dma_channel); in dma_callback_tx_done()
606 .data.tx.buf = data->async.dma_tx.buf, in dma_callback_tx_done()
607 .data.tx.len = data->async.dma_tx.buf_len}; in dma_callback_tx_done()
609 data->async.dma_tx.buf = NULL; in dma_callback_tx_done()
610 data->async.dma_tx.buf_len = 0; in dma_callback_tx_done()
612 if (data->async.cb) { in dma_callback_tx_done()
613 data->async.cb(uart_dev, &evt, data->async.user_data); in dma_callback_tx_done()
618 dma_stop(data->async.dma_tx.dev, data->async.dma_tx.dma_channel); in dma_callback_tx_done()
631 (void)ifx_cat1_uart_async_tx_abort(async->uart_dev); in ifx_cat1_uart_async_tx_timeout()
637 .data.rx.buf = (uint8_t *)data->async.dma_rx.buf, in async_evt_rx_rdy()
639 data->async.dma_rx.counter - data->async.dma_rx.offset, in async_evt_rx_rdy()
640 .data.rx.offset = data->async.dma_rx.offset}; in async_evt_rx_rdy()
642 data->async.dma_rx.offset = data->async.dma_rx.counter; in async_evt_rx_rdy()
644 if (event.data.rx.len > 0 && data->async.cb) { in async_evt_rx_rdy()
645 data->async.cb(data->async.uart_dev, &event, data->async.user_data); in async_evt_rx_rdy()
653 if (data->async.cb) { in async_evt_rx_buf_request()
654 data->async.cb(data->async.uart_dev, &evt, data->async.user_data); in async_evt_rx_buf_request()
662 if (buffer_type == NEXT_BUFFER && !data->async.rx_next_buf) { in async_evt_rx_release_buffer()
666 if (buffer_type == CURRENT_BUFFER && !data->async.dma_rx.buf) { in async_evt_rx_release_buffer()
671 event.data.rx_buf.buf = data->async.rx_next_buf; in async_evt_rx_release_buffer()
672 data->async.rx_next_buf = NULL; in async_evt_rx_release_buffer()
673 data->async.rx_next_buf_len = 0; in async_evt_rx_release_buffer()
675 event.data.rx_buf.buf = data->async.dma_rx.buf; in async_evt_rx_release_buffer()
676 data->async.dma_rx.buf = NULL; in async_evt_rx_release_buffer()
677 data->async.dma_rx.buf_len = 0; in async_evt_rx_release_buffer()
680 if (data->async.cb) { in async_evt_rx_release_buffer()
681 data->async.cb(data->async.uart_dev, &event, data->async.user_data); in async_evt_rx_release_buffer()
689 data->async.dma_rx.buf = NULL; in async_evt_rx_disabled()
690 data->async.dma_rx.buf_len = 0; in async_evt_rx_disabled()
691 data->async.dma_rx.offset = 0; in async_evt_rx_disabled()
692 data->async.dma_rx.counter = 0; in async_evt_rx_disabled()
694 if (data->async.cb) { in async_evt_rx_disabled()
695 data->async.cb(data->async.uart_dev, &event, data->async.user_data); in async_evt_rx_disabled()
706 if (data->async.dma_rx.buf_len == 0 || data->async.cb == NULL) { in async_evt_rx_stopped()
710 rx->buf = data->async.dma_rx.buf; in async_evt_rx_stopped()
712 if (dma_get_status(data->async.dma_rx.dev, data->async.dma_rx.dma_channel, &stat) == 0) { in async_evt_rx_stopped()
713 data->async.dma_rx.counter = data->async.dma_rx.buf_len - stat.pending_length; in async_evt_rx_stopped()
715 rx->len = data->async.dma_rx.counter - data->async.dma_rx.offset; in async_evt_rx_stopped()
716 rx->offset = data->async.dma_rx.counter; in async_evt_rx_stopped()
718 data->async.cb(data->async.uart_dev, &event, data->async.user_data); in async_evt_rx_stopped()
724 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_async_rx_enable()
729 if (data->async.dma_rx.dev == NULL) { in ifx_cat1_uart_async_rx_enable()
730 return -ENODEV; in ifx_cat1_uart_async_rx_enable()
733 if (data->async.dma_rx.buf_len != 0) { in ifx_cat1_uart_async_rx_enable()
734 return -EBUSY; in ifx_cat1_uart_async_rx_enable()
738 data->async.dma_rx.buf = (uint8_t *)rx_data; in ifx_cat1_uart_async_rx_enable()
739 data->async.dma_rx.buf_len = rx_data_size; in ifx_cat1_uart_async_rx_enable()
740 data->async.dma_rx.blk_cfg.block_size = 0; in ifx_cat1_uart_async_rx_enable()
741 data->async.dma_rx.dma_transmitted_bytes = 0; in ifx_cat1_uart_async_rx_enable()
742 data->async.dma_rx.timeout = timeout; in ifx_cat1_uart_async_rx_enable()
753 err = dma_get_status(data->async.dma_rx.dev, data->async.dma_rx.dma_channel, &dma_status); in ifx_cat1_uart_async_rx_enable()
759 return -EBUSY; in ifx_cat1_uart_async_rx_enable()
764 k_work_reschedule(&data->async.dma_rx.timeout_work, K_USEC(timeout)); in ifx_cat1_uart_async_rx_enable()
776 struct ifx_cat1_uart_data *const data = uart_dev->data; in dma_callback_rx_rdy()
782 k_work_cancel_delayable(&data->async.dma_rx.timeout_work); in dma_callback_rx_rdy()
783 data->async.dma_rx.counter = data->async.dma_rx.buf_len; in dma_callback_rx_rdy()
788 data->async.dma_rx.buf = NULL; in dma_callback_rx_rdy()
789 data->async.dma_rx.buf_len = 0; in dma_callback_rx_rdy()
790 data->async.dma_rx.blk_cfg.block_size = 0; in dma_callback_rx_rdy()
791 data->async.dma_rx.dma_transmitted_bytes = 0; in dma_callback_rx_rdy()
793 if (!data->async.rx_next_buf) { in dma_callback_rx_rdy()
794 dma_stop(data->async.dma_rx.dev, data->async.dma_rx.dma_channel); in dma_callback_rx_rdy()
799 data->async.dma_rx.buf = data->async.rx_next_buf; in dma_callback_rx_rdy()
800 data->async.dma_rx.buf_len = data->async.rx_next_buf_len; in dma_callback_rx_rdy()
801 data->async.dma_rx.offset = 0; in dma_callback_rx_rdy()
802 data->async.dma_rx.counter = 0; in dma_callback_rx_rdy()
803 data->async.rx_next_buf = NULL; in dma_callback_rx_rdy()
804 data->async.rx_next_buf_len = 0; in dma_callback_rx_rdy()
810 if ((data->async.dma_rx.timeout != SYS_FOREVER_US) && in dma_callback_rx_rdy()
811 (data->async.dma_rx.timeout != 0)) { in dma_callback_rx_rdy()
812 k_work_reschedule(&data->async.dma_rx.timeout_work, in dma_callback_rx_rdy()
813 K_USEC(data->async.dma_rx.timeout)); in dma_callback_rx_rdy()
818 dma_stop(data->async.dma_rx.dev, data->async.dma_rx.dma_channel); in dma_callback_rx_rdy()
843 if (dma_rx->buf_len == 0) { in ifx_cat1_uart_async_rx_timeout()
847 if (dma_get_status(dma_rx->dev, dma_rx->dma_channel, &stat) == 0) { in ifx_cat1_uart_async_rx_timeout()
848 size_t rx_rcv_len = dma_rx->buf_len - stat.pending_length; in ifx_cat1_uart_async_rx_timeout()
850 if ((rx_rcv_len > 0) && (rx_rcv_len == dma_rx->counter)) { in ifx_cat1_uart_async_rx_timeout()
851 dma_rx->counter = rx_rcv_len; in ifx_cat1_uart_async_rx_timeout()
854 dma_rx->counter = rx_rcv_len; in ifx_cat1_uart_async_rx_timeout()
859 if ((dma_rx->timeout != SYS_FOREVER_US) && (dma_rx->timeout != 0)) { in ifx_cat1_uart_async_rx_timeout()
860 k_work_reschedule(&dma_rx->timeout_work, K_USEC(dma_rx->timeout)); in ifx_cat1_uart_async_rx_timeout()
866 struct ifx_cat1_uart_data *data = dev->data; in ifx_cat1_uart_async_rx_disable()
870 k_work_cancel_delayable(&data->async.dma_rx.timeout_work); in ifx_cat1_uart_async_rx_disable()
874 if (data->async.dma_rx.buf_len == 0) { in ifx_cat1_uart_async_rx_disable()
875 __ASSERT_NO_MSG(data->async.dma_rx.buf == NULL); in ifx_cat1_uart_async_rx_disable()
877 return -EINVAL; in ifx_cat1_uart_async_rx_disable()
880 dma_stop(data->async.dma_rx.dev, data->async.dma_rx.dma_channel); in ifx_cat1_uart_async_rx_disable()
882 if (dma_get_status(data->async.dma_rx.dev, data->async.dma_rx.dma_channel, &stat) == 0) { in ifx_cat1_uart_async_rx_disable()
883 size_t rx_rcv_len = data->async.dma_rx.buf_len - stat.pending_length; in ifx_cat1_uart_async_rx_disable()
885 if (rx_rcv_len > data->async.dma_rx.offset) { in ifx_cat1_uart_async_rx_disable()
886 data->async.dma_rx.counter = rx_rcv_len; in ifx_cat1_uart_async_rx_disable()
900 struct ifx_cat1_uart_data *data = dev->data; in ifx_cat1_uart_async_rx_buf_rsp()
906 if (data->async.dma_rx.buf_len == 0U) { in ifx_cat1_uart_async_rx_buf_rsp()
907 ret = -EACCES; in ifx_cat1_uart_async_rx_buf_rsp()
911 if (data->async.rx_next_buf_len != 0U) { in ifx_cat1_uart_async_rx_buf_rsp()
912 ret = -EBUSY; in ifx_cat1_uart_async_rx_buf_rsp()
916 data->async.rx_next_buf = buf; in ifx_cat1_uart_async_rx_buf_rsp()
917 data->async.rx_next_buf_len = len; in ifx_cat1_uart_async_rx_buf_rsp()
928 struct ifx_cat1_uart_data *const data = dev->data; in ifx_cat1_uart_init()
929 const struct ifx_cat1_uart_config *const config = dev->config; in ifx_cat1_uart_init()
934 .resource = &data->hw_resource, in ifx_cat1_uart_init()
936 .clock = &data->clock, in ifx_cat1_uart_init()
937 .gpios = {.pin_tx = NC, .pin_rts = NC, .pin_cts = NC}, in ifx_cat1_uart_init()
941 data->hw_resource.type = CYHAL_RSC_SCB; in ifx_cat1_uart_init()
942 data->hw_resource.block_num = _get_hw_block_num(config->reg_addr); in ifx_cat1_uart_init()
945 ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); in ifx_cat1_uart_init()
951 result = _cyhal_utils_allocate_clock(&data->clock, &data->hw_resource, in ifx_cat1_uart_init()
954 return -ENOTSUP; in ifx_cat1_uart_init()
958 en_clk_dst_t clk_idx = _cyhal_scb_get_clock_index(uart_init_cfg.resource->block_num); in ifx_cat1_uart_init()
962 return -ENOTSUP; in ifx_cat1_uart_init()
966 result = cyhal_uart_init_cfg(&data->obj, &uart_init_cfg); in ifx_cat1_uart_init()
968 return -ENOTSUP; in ifx_cat1_uart_init()
972 data->obj.is_clock_owned = true; in ifx_cat1_uart_init()
973 ret = ifx_cat1_uart_configure(dev, &config->dt_cfg); in ifx_cat1_uart_init()
976 data->async.uart_dev = dev; in ifx_cat1_uart_init()
977 if (data->async.dma_rx.dev != NULL) { in ifx_cat1_uart_init()
980 if (!device_is_ready(data->async.dma_rx.dev)) { in ifx_cat1_uart_init()
981 return -ENODEV; in ifx_cat1_uart_init()
984 data->async.dma_rx.blk_cfg.source_address = in ifx_cat1_uart_init()
985 (uint32_t)(&config->reg_addr->RX_FIFO_RD); in ifx_cat1_uart_init()
986 data->async.dma_rx.blk_cfg.source_addr_adj = DMA_ADDR_ADJ_NO_CHANGE; in ifx_cat1_uart_init()
987 data->async.dma_rx.blk_cfg.dest_addr_adj = DMA_ADDR_ADJ_INCREMENT; in ifx_cat1_uart_init()
988 data->async.dma_rx.dma_cfg.head_block = &data->async.dma_rx.blk_cfg; in ifx_cat1_uart_init()
989 data->async.dma_rx.dma_cfg.user_data = (void *)dev; in ifx_cat1_uart_init()
990 data->async.dma_rx.dma_cfg.dma_callback = dma_callback_rx_rdy; in ifx_cat1_uart_init()
992 if (cyhal_uart_enable_output(&data->obj, in ifx_cat1_uart_init()
995 return -ENOTSUP; in ifx_cat1_uart_init()
998 if (ifx_cat1_dma_ex_connect_digital(data->async.dma_rx.dev, in ifx_cat1_uart_init()
999 data->async.dma_rx.dma_channel, uart_source, in ifx_cat1_uart_init()
1001 return -ENOTSUP; in ifx_cat1_uart_init()
1004 Cy_SCB_SetRxFifoLevel(config->reg_addr, 0); in ifx_cat1_uart_init()
1007 if (data->async.dma_tx.dev != NULL) { in ifx_cat1_uart_init()
1010 if (!device_is_ready(data->async.dma_tx.dev)) { in ifx_cat1_uart_init()
1011 return -ENODEV; in ifx_cat1_uart_init()
1014 data->async.dma_tx.blk_cfg.dest_address = (uint32_t)(&config->reg_addr->TX_FIFO_WR); in ifx_cat1_uart_init()
1015 data->async.dma_tx.blk_cfg.source_addr_adj = DMA_ADDR_ADJ_INCREMENT; in ifx_cat1_uart_init()
1016 data->async.dma_tx.blk_cfg.dest_addr_adj = DMA_ADDR_ADJ_NO_CHANGE; in ifx_cat1_uart_init()
1017 data->async.dma_tx.dma_cfg.head_block = &data->async.dma_tx.blk_cfg; in ifx_cat1_uart_init()
1018 data->async.dma_tx.dma_cfg.user_data = (void *)dev; in ifx_cat1_uart_init()
1019 data->async.dma_tx.dma_cfg.dma_callback = dma_callback_tx_done; in ifx_cat1_uart_init()
1021 if (cyhal_uart_enable_output(&data->obj, in ifx_cat1_uart_init()
1024 return -ENOTSUP; in ifx_cat1_uart_init()
1027 if (ifx_cat1_dma_ex_connect_digital(data->async.dma_tx.dev, in ifx_cat1_uart_init()
1028 data->async.dma_tx.dma_channel, uart_source, in ifx_cat1_uart_init()
1030 return -ENOTSUP; in ifx_cat1_uart_init()
1032 Cy_SCB_SetTxFifoLevel(config->reg_addr, 1); in ifx_cat1_uart_init()
1035 k_work_init_delayable(&data->async.dma_tx.timeout_work, ifx_cat1_uart_async_tx_timeout); in ifx_cat1_uart_init()
1036 k_work_init_delayable(&data->async.dma_rx.timeout_work, ifx_cat1_uart_async_rx_timeout); in ifx_cat1_uart_init()