22 	int res;  in icm42688_reset()  local
30 	res = icm42688_spi_single_write(&dev_cfg->spi, REG_DEVICE_CONFIG, BIT_SOFT_RESET);  in icm42688_reset()
32 	if (res) {  in icm42688_reset()
34 		return res;  in icm42688_reset()
41 	res = icm42688_spi_read(&dev_cfg->spi, REG_INT_STATUS, &value, 1);  in icm42688_reset()
43 	if (res) {  in icm42688_reset()
44 		return res;  in icm42688_reset()
52 	res = icm42688_spi_read(&dev_cfg->spi, REG_WHO_AM_I, &value, 1);  in icm42688_reset()
53 	if (res) {  in icm42688_reset()
54 		return res;  in icm42688_reset()
125 	int res;  in icm42688_configure()  local
128 	res = icm42688_spi_single_write(&dev_cfg->spi, REG_INT_SOURCE0, 0);  in icm42688_configure()
132 		res = icm42688_spi_single_write(&dev_cfg->spi, REG_FIFO_CONFIG,  in icm42688_configure()
135 		if (res != 0) {  in icm42688_configure()
140 		res = icm42688_spi_single_write(&dev_cfg->spi, REG_SIGNAL_PATH_RESET,  in icm42688_configure()
143 		if (res != 0) {  in icm42688_configure()
157 	res = icm42688_spi_single_write(&dev_cfg->spi, REG_PWR_MGMT0, pwr_mgmt0);  in icm42688_configure()
159 	if (res != 0) {  in icm42688_configure()
173 	res = icm42688_spi_single_write(&dev_cfg->spi, REG_ACCEL_CONFIG0, accel_config0);  in icm42688_configure()
174 	if (res != 0) {  in icm42688_configure()
183 	res = icm42688_spi_single_write(&dev_cfg->spi, REG_GYRO_CONFIG0, gyro_config0);  in icm42688_configure()
184 	if (res != 0) {  in icm42688_configure()
199 	res = icm42688_spi_single_write(&dev_cfg->spi, REG_FIFO_CONFIG, fifo_config_bypass);  in icm42688_configure()
200 	if (res != 0) {  in icm42688_configure()
208 	res = icm42688_spi_single_write(&dev_cfg->spi, REG_FSYNC_CONFIG, 0);  in icm42688_configure()
209 	if (res != 0) {  in icm42688_configure()
213 	res = icm42688_spi_read(&dev_cfg->spi, REG_TMST_CONFIG, &tmst_config, 1);  in icm42688_configure()
214 	if (res != 0) {  in icm42688_configure()
218 	res = icm42688_spi_single_write(&dev_cfg->spi, REG_TMST_CONFIG, tmst_config & ~BIT(1));  in icm42688_configure()
219 	if (res != 0) {  in icm42688_configure()
226 		res = icm42688_trigger_enable_interrupt(dev, cfg);  in icm42688_configure()
228 		res = icm42688_spi_single_write(&dev_cfg->spi, REG_INT_CONFIG,  in icm42688_configure()
231 	if (res) {  in icm42688_configure()
233 		return res;  in icm42688_configure()
244 	res = icm42688_spi_single_write(&dev_cfg->spi, REG_INT_CONFIG1, int_config1);  in icm42688_configure()
245 	if (res) {  in icm42688_configure()
247 		return res;  in icm42688_configure()
262 		res = icm42688_spi_single_write(&dev_cfg->spi, REG_FIFO_CONFIG1, fifo_cfg1);  in icm42688_configure()
263 		if (res != 0) {  in icm42688_configure()
273 		res = icm42688_spi_single_write(&dev_cfg->spi, REG_FIFO_CONFIG2, fifo_wml);  in icm42688_configure()
274 		if (res != 0) {  in icm42688_configure()
282 		res = icm42688_spi_single_write(&dev_cfg->spi, REG_FIFO_CONFIG3, fifo_wmh);  in icm42688_configure()
283 		if (res != 0) {  in icm42688_configure()
292 		res = icm42688_spi_single_write(&dev_cfg->spi, REG_FIFO_CONFIG, fifo_config);  in icm42688_configure()
298 		res = icm42688_spi_single_write(&dev_cfg->spi, REG_INT_SOURCE0, int_source0);  in icm42688_configure()
299 		if (res) {  in icm42688_configure()
300 			return res;  in icm42688_configure()
309 		res = icm42688_spi_single_write(&dev_cfg->spi, REG_INT_SOURCE0, int_source0);  in icm42688_configure()
310 		if (res) {  in icm42688_configure()
311 			return res;  in icm42688_configure()
315 	return res;  in icm42688_configure()
335 	int res;  in icm42688_read_all()  local
337 	res = icm42688_spi_read(&dev_cfg->spi, REG_TEMP_DATA1, data, 14);  in icm42688_read_all()
339 	return res;  in icm42688_read_all()