Lines Matching refs:FIELD_PREP
133 FIELD_PREP(MASK_FIFO_MODE, BIT_FIFO_MODE_BYPASS)); in icm42688_configure()
141 FIELD_PREP(BIT_FIFO_FLUSH, 1)); in icm42688_configure()
152 uint8_t pwr_mgmt0 = FIELD_PREP(MASK_GYRO_MODE, cfg->gyro_pwr_mode) | in icm42688_configure()
153 FIELD_PREP(MASK_ACCEL_MODE, cfg->accel_pwr_mode) | in icm42688_configure()
154 FIELD_PREP(BIT_TEMP_DIS, cfg->temp_dis); in icm42688_configure()
169 uint8_t accel_config0 = FIELD_PREP(MASK_ACCEL_ODR, cfg->accel_odr) | in icm42688_configure()
170 FIELD_PREP(MASK_ACCEL_UI_FS_SEL, cfg->accel_fs); in icm42688_configure()
179 uint8_t gyro_config0 = FIELD_PREP(MASK_GYRO_ODR, cfg->gyro_odr) | in icm42688_configure()
180 FIELD_PREP(MASK_GYRO_UI_FS_SEL, cfg->gyro_fs); in icm42688_configure()
196 uint8_t fifo_config_bypass = FIELD_PREP(MASK_FIFO_MODE, BIT_FIFO_MODE_BYPASS); in icm42688_configure()
240 int_config1 = FIELD_PREP(BIT_INT_TPULSE_DURATION, 1) | in icm42688_configure()
241 FIELD_PREP(BIT_INT_TDEASSERT_DISABLE, 1); in icm42688_configure()
258 FIELD_PREP(BIT_FIFO_TEMP_EN, 1) | FIELD_PREP(BIT_FIFO_GYRO_EN, 1) | in icm42688_configure()
259 FIELD_PREP(BIT_FIFO_ACCEL_EN, 1) | FIELD_PREP(BIT_FIFO_TMST_FSYNC_EN, 1); in icm42688_configure()
289 uint8_t fifo_config = FIELD_PREP(MASK_FIFO_MODE, BIT_FIFO_MODE_STREAM); in icm42688_configure()