Lines Matching full:6
23 #define LSM9DS0_GYRO_MASK_CTRL_REG1_G_DR (BIT(7) | BIT(6))
24 #define LSM9DS0_GYRO_SHIFT_CTRL_REG1_G_DR 6
45 #define LSM9DS0_GYRO_MASK_CTRL_REG3_G_I1_BOOT BIT(6)
46 #define LSM9DS0_GYRO_SHIFT_CTRL_REG3_G_I1_BOOT 6
63 #define LSM9DS0_GYRO_MASK_CTRL_REG4_G_BLE BIT(6)
64 #define LSM9DS0_GYRO_SHIFT_CTRL_REG4_G_BLE 6
73 #define LSM9DS0_GYRO_MASK_CTRL_REG5_G_FIFO_EN BIT(6)
74 #define LSM9DS0_GYRO_SHIFT_CTRL_REG5_G_FIFO_EN 6
87 #define LSM9DS0_GYRO_MASK_STATUS_REG_G_ZOR BIT(6)
88 #define LSM9DS0_GYRO_SHIFT_STATUS_REG_G_ZOR 6
110 #define LSM9DS0_GYRO_MASK_FIFO_CTRL_REG_G_FM (BIT(7) | BIT(6) | BIT(5))
119 #define LSM9DS0_GYRO_MASK_FIFO_SRC_REG_G_OVRN BIT(6)
120 #define LSM9DS0_GYRO_SHIFT_FIFO_SRC_REG_G_OVRN 6
130 #define LSM9DS0_GYRO_MASK_INT1_CFG_G_LIR BIT(6)
131 #define LSM9DS0_GYRO_SHIFT_INT1_CFG_G_LIR 6
146 #define LSM9DS0_GYRO_MASK_INT1_SRC_G_IA BIT(6)
147 #define LSM9DS0_GYRO_SHIFT_INT1_SRC_G_IA 6
162 #define LSM9DS0_GYRO_MASK_INT1_THS_XH_G (BIT(6) | BIT(5) | BIT(4) | \
169 #define LSM9DS0_GYRO_MASK_INT1_THS_YH_G (BIT(6) | BIT(5) | BIT(4) | \
176 #define LSM9DS0_GYRO_MASK_INT1_THS_ZH_G (BIT(6) | BIT(5) | BIT(4) | \
185 #define LSM9DS0_GYRO_MASK_INT1_DURATION_G_D (BIT(6) | BIT(5) | BIT(4) | \