Lines Matching refs:BIT
29 #define LSM6DSL_MASK_FUNC_CFG_EN BIT(7)
31 #define LSM6DSL_MASK_FUNC_CFG_EN_B BIT(5)
35 #define LSM6DSL_MASK_SENSOR_SYNC_TIME_FRAME_TPH (BIT(3) | BIT(2) | \
36 BIT(1) | BIT(0))
40 #define LSM6DSL_MASK_SENSOR_SYNC_RES_RATIO (BIT(1) | BIT(0))
44 #define LSM6DSL_MASK_FIFO_CTRL1_FTH (BIT(7) | BIT(6) | \
45 BIT(5) | BIT(4) | \
46 BIT(3) | BIT(2) | \
47 BIT(1) | BIT(0))
51 #define LSM6DSL_MASK_FIFO_CTRL2_TIMER_PEDO_FIFO_EN BIT(7)
53 #define LSM6DSL_MASK_FIFO_CTRL2_TIMER_PEDO_FIFO_DRDY BIT(6)
55 #define LSM6DSL_MASK_FIFO_CTRL2_FIFO_TEMP_EN BIT(3)
57 #define LSM6DSL_MASK_FIFO_CTRL2_FTH (BIT(2) | BIT(1) | \
58 BIT(0))
62 #define LSM6DSL_MASK_FIFO_CTRL3_DEC_FIFO_GYRO (BIT(5) | BIT(4) | \
63 BIT(3))
65 #define LSM6DSL_MASK_FIFO_CTRL3_DEC_FIFO_XL (BIT(2) | BIT(1) | \
66 BIT(0))
70 #define LSM6DSL_MASK_FIFO_CTRL4_STOP_ON_FTH BIT(7)
72 #define LSM6DSL_MASK_FIFO_CTRL4_ONLY_HIGH_DATA BIT(6)
74 #define LSM6DSL_MASK_FIFO_CTRL4_DEC_DS4_FIFO (BIT(5) | BIT(4) | \
75 BIT(3))
77 #define LSM6DSL_MASK_FIFO_CTRL4_DEC_DS3_FIFO (BIT(2) | BIT(1) | \
78 BIT(0))
82 #define LSM6DSL_MASK_FIFO_CTRL5_ODR_FIFO (BIT(6) | BIT(5) | \
83 BIT(4) | BIT(3))
85 #define LSM6DSL_MASK_FIFO_CTRL5_FIFO_MODE (BIT(2) | BIT(1) | \
86 BIT(0))
90 #define LSM6DSL_MASK_DRDY_PULSE_CFG_G_DRDY_PULSED BIT(7)
92 #define LSM6DSL_MASK_DRDY_PULSE_CFG_G_INT2_WRIST_TILT BIT(0)
96 #define LSM6DSL_MASK_INT1_CTRL_STEP_DETECTOR BIT(7)
98 #define LSM6DSL_MASK_INT1_CTRL_SIGN_MOT BIT(6)
100 #define LSM6DSL_MASK_INT1_CTRL_FULL_FLAG BIT(5)
102 #define LSM6DSL_MASK_INT1_CTRL_FIFO_OVR BIT(4)
104 #define LSM6DSL_MASK_INT1_FTH BIT(3)
106 #define LSM6DSL_MASK_INT1_CTRL_BOOT BIT(2)
108 #define LSM6DSL_MASK_INT1_CTRL_DRDY_G BIT(1)
110 #define LSM6DSL_MASK_INT1_CTRL_DRDY_XL BIT(0)
114 #define LSM6DSL_MASK_INT2_CTRL_STEP_DELTA BIT(7)
116 #define LSM6DSL_MASK_INT2_CTRL_STEP_COUNT_OV BIT(6)
118 #define LSM6DSL_MASK_INT2_CTRL_FULL_FLAG BIT(5)
120 #define LSM6DSL_MASK_INT2_CTRL_FIFO_OVR BIT(4)
122 #define LSM6DSL_MASK_INT2_FTH BIT(3)
124 #define LSM6DSL_MASK_INT2_DRDY_TEMP BIT(2)
126 #define LSM6DSL_MASK_INT2_CTRL_DRDY_G BIT(1)
128 #define LSM6DSL_MASK_INT2_CTRL_DRDY_XL BIT(0)
135 #define LSM6DSL_MASK_CTRL1_XL_ODR_XL (BIT(7) | BIT(6) | \
136 BIT(5) | BIT(4))
138 #define LSM6DSL_MASK_CTRL1_XL_FS_XL (BIT(3) | BIT(2))
140 #define LSM6DSL_MASK_CTRL1_XL_LPF1_BW_SEL BIT(1)
144 #define LSM6DSL_MASK_CTRL2_G_ODR_G (BIT(7) | BIT(6) | \
145 BIT(5) | BIT(4))
147 #define LSM6DSL_MASK_CTRL2_G_FS_G (BIT(3) | BIT(2))
149 #define LSM6DSL_MASK_CTRL2_FS125 BIT(1)
153 #define LSM6DSL_MASK_CTRL3_C_BOOT BIT(7)
155 #define LSM6DSL_MASK_CTRL3_C_BDU BIT(6)
157 #define LSM6DSL_MASK_CTRL3_C_H_LACTIVE BIT(5)
159 #define LSM6DSL_MASK_CTRL3_C_PP_OD BIT(4)
161 #define LSM6DSL_MASK_CTRL3_C_SIM BIT(3)
163 #define LSM6DSL_MASK_CTRL3_C_IF_INC BIT(2)
165 #define LSM6DSL_MASK_CTRL3_C_BLE BIT(1)
167 #define LSM6DSL_MASK_CTRL3_C_SW_RESET BIT(0)
171 #define LSM6DSL_MASK_CTRL4_C_DEN_XL_EN BIT(7)
173 #define LSM6DSL_MASK_CTRL4_C_SLEEP BIT(6)
175 #define LSM6DSL_MASK_CTRL4_C_INT2_ON_INT1 BIT(5)
177 #define LSM6DSL_MASK_CTRL4_C_DEN_DRDY_INT1 BIT(4)
179 #define LSM6DSL_MASK_CTRL4_C_DRDY_MASK BIT(3)
181 #define LSM6DSL_MASK_CTRL4_C_I2C_DISABLE BIT(2)
183 #define LSM6DSL_MASK_CTRL4_C_LPF1_SEL_G BIT(1)
187 #define LSM6DSL_MASK_CTRL5_C_ROUNDING (BIT(7) | BIT(6) | \
188 BIT(5))
190 #define LSM6DSL_MASK_CTRL5_C_DEN_LH BIT(4)
192 #define LSM6DSL_MASK_CTRL5_C_ST_G (BIT(3) | BIT(2))
194 #define LSM6DSL_MASK_CTRL5_C_ST_XL (BIT(1) | BIT(0))
198 #define LSM6DSL_MASK_CTRL6_C_TRIG_EN BIT(7)
200 #define LSM6DSL_MASK_CTRL6_C_LVL_EN BIT(6)
202 #define LSM6DSL_MASK_CTRL6_C_LVL2_EN BIT(5)
204 #define LSM6DSL_MASK_CTRL6_C_XL_HM_MODE BIT(4)
206 #define LSM6DSL_MASK_CTRL6_C_USR_OFF_W BIT(3)
208 #define LSM6DSL_MASK_CTRL6_C_FTYPE (BIT(0) | BIT(1))
212 #define LSM6DSL_MASK_CTRL7_G_HM_MODE BIT(7)
214 #define LSM6DSL_MASK_CTRL7_HP_EN_G BIT(6)
216 #define LSM6DSL_MASK_CTRL7_HPM_G (BIT(5) | BIT(4))
218 #define LSM6DSL_MASK_CTRL7_ROUNDING_STATUS BIT(2)
222 #define LSM6DSL_MASK_CTRL8_LPF2_XL_EN BIT(7)
224 #define LSM6DSL_MASK_CTRL8_HPCF_XL (BIT(6) | BIT(5))
226 #define LSM6DSL_MASK_CTRL8_HP_REF_MODE BIT(4)
228 #define LSM6DSL_MASK_CTRL8_INPUT_COMPOSITE BIT(3)
230 #define LSM6DSL_MASK_CTRL8_HP_SLOPE_XL_EN BIT(2)
232 #define LSM6DSL_MASK_CTRL8_LOW_PASS_ON_6D BIT(0)
236 #define LSM6DSL_MASK_CTRL9_XL_DEN_X BIT(7)
238 #define LSM6DSL_MASK_CTRL9_XL_DEN_Y BIT(6)
240 #define LSM6DSL_MASK_CTRL9_XL_DEN_Z BIT(5)
242 #define LSM6DSL_MASK_CTRL9_XL_DEN_G BIT(4)
244 #define LSM6DSL_MASK_CTRL9_XL_SOFT_EN BIT(2)
248 #define LSM6DSL_MASK_CTRL10_C_WRIST_TILT_EN BIT(7)
250 #define LSM6DSL_MASK_CTRL10_C_TIMER_EN BIT(5)
252 #define LSM6DSL_MASK_CTRL10_C_PEDO_EN BIT(4)
254 #define LSM6DSL_MASK_CTRL10_C_TILT_EN BIT(3)
256 #define LSM6DSL_MASK_CTRL10_C_FUNC_EN BIT(2)
258 #define LSM6DSL_MASK_CTRL10_C_PEDO_RST_STEP BIT(1)
260 #define LSM6DSL_MASK_CTRL10_C_SIGN_MOTION_EN BIT(0)
264 #define LSM6DSL_MASK_MASTER_CONFIG_DRDY_ON_INT1 BIT(7)
266 #define LSM6DSL_MASK_MASTER_CONFIG_DATA_VALID_SEL_FIFO BIT(6)
268 #define LSM6DSL_MASK_MASTER_CONFIG_START_CONFIG BIT(4)
270 #define LSM6DSL_MASK_MASTER_CONFIG_PULL_UP_EN BIT(3)
272 #define LSM6DSL_MASK_MASTER_CONFIG_PASS_THROUGH_MODE BIT(2)
274 #define LSM6DSL_MASK_MASTER_CONFIG_IRON_EN BIT(1)
276 #define LSM6DSL_MASK_MASTER_CONFIG_MASTER_ON BIT(0)
280 #define LSM6DSL_MASK_WAKE_UP_SRC_FF_IA BIT(5)
282 #define LSM6DSL_MASK_WAKE_UP_SRC_SLEEP_STATE_IA BIT(4)
284 #define LSM6DSL_MASK_WAKE_UP_SRC_WU_IA BIT(3)
286 #define LSM6DSL_MASK_WAKE_UP_SRC_X_WU BIT(2)
288 #define LSM6DSL_MASK_WAKE_UP_SRC_Y_WU BIT(1)
290 #define LSM6DSL_MASK_WAKE_UP_SRC_Z_WU BIT(0)
294 #define LSM6DSL_MASK_TAP_SRC_TAP_IA BIT(6)
296 #define LSM6DSL_MASK_TAP_SRC_SINGLE_TAP BIT(5)
298 #define LSM6DSL_MASK_TAP_SRC_DOUBLE_TAP BIT(4)
300 #define LSM6DSL_MASK_TAP_SRC_TAP_SIGN BIT(3)
302 #define LSM6DSL_MASK_TAP_SRC_X_TAP BIT(2)
304 #define LSM6DSL_MASK_TAP_SRC_Y_TAP BIT(1)
306 #define LSM6DSL_MASK_TAP_SRC_Z_TAP BIT(0)
310 #define LSM6DSL_MASK_D6D_SRC_DEN_DRDY BIT(7)
312 #define LSM6DSL_MASK_D6D_SRC_D6D_IA BIT(6)
314 #define LSM6DSL_MASK_D6D_SRC_ZH BIT(5)
316 #define LSM6DSL_MASK_D6D_SRC_ZL BIT(4)
318 #define LSM6DSL_MASK_D6D_SRC_YH BIT(3)
320 #define LSM6DSL_MASK_D6D_SRC_YL BIT(2)
322 #define LSM6DSL_MASK_D6D_SRC_XH BIT(1)
324 #define LSM6DSL_MASK_D6D_SRC_XL BIT(0)
328 #define LSM6DSL_MASK_STATUS_REG_TDA BIT(2)
330 #define LSM6DSL_MASK_STATUS_REG_GDA BIT(1)
332 #define LSM6DSL_MASK_STATUS_REG_XLDA BIT(0)
364 #define LSM6DSL_MASK_FIFO_STATUS2_WATERM BIT(7)
366 #define LSM6DSL_MASK_FIFO_STATUS2_OVER_RUN BIT(6)
368 #define LSM6DSL_MASK_FIFO_STATUS2_FIFO_FULL_SMART BIT(5)
370 #define LSM6DSL_MASK_FIFO_STATUS2_FIFO_EMPTY BIT(4)
372 #define LSM6DSL_MASK_FIFO_STATUS2_DIFF_FIFO (BIT(2) | BIT(1) | \
373 BIT(0))
381 #define LSM6DSL_MASK_FIFO_STATUS4_FIFO_PATTERN (BIT(1) | BIT(0))
401 #define LSM6DSL_MASK_FUNC_SRC1_STEP_COUNT_DELTA_IA BIT(7)
403 #define LSM6DSL_MASK_FUNC_SRC1_SIGN_MOTION_IA BIT(6)
405 #define LSM6DSL_MASK_FUNC_SRC1_TILT_IA BIT(5)
407 #define LSM6DSL_MASK_FUNC_SRC1_STEP_DETECTED BIT(4)
409 #define LSM6DSL_MASK_FUNC_SRC1_STEP_OVERFLOW BIT(3)
411 #define LSM6DSL_MASK_FUNC_SRC1_HI_FAIL BIT(2)
413 #define LSM6DSL_MASK_FUNC_SRC1_SI_SEND_OP BIT(1)
415 #define LSM6DSL_MASK_FUNC_SRC1_SENSORHUB_END_OP BIT(0)
419 #define LSM6DSL_MASK_FUNC_SRC2_SLAVE3_NACK BIT(6)
421 #define LSM6DSL_MASK_FUNC_SRC2_SLAVE2_NACK BIT(5)
423 #define LSM6DSL_MASK_FUNC_SRC2_SLAVE1_NACK BIT(4)
425 #define LSM6DSL_MASK_FUNC_SRC2_SLAVE0_NACK BIT(3)
427 #define LSM6DSL_MASK_FUNC_SRC2_WRIST_TILT_IA BIT(0)
431 #define LSM6DSL_MASK_WRIST_TILT_IA_XPOS BIT(7)
433 #define LSM6DSL_MASK_WRIST_TILT_IA_XNEG BIT(6)
435 #define LSM6DSL_MASK_WRIST_TILT_IA_YPOS BIT(5)
437 #define LSM6DSL_MASK_WRIST_TILT_IA_YNEG BIT(4)
439 #define LSM6DSL_MASK_WRIST_TILT_IA_ZPOS BIT(3)
441 #define LSM6DSL_MASK_WRIST_TILT_IA_ZNEG BIT(2)
445 #define LSM6DSL_MASK_TAP_CFG_INTERRPUTS_ENABLE BIT(7)
447 #define LSM6DSL_MASK_TAP_CFG_INACT_EN (BIT(6) | BIT(5))
449 #define LSM6DSL_MASK_TAP_CFG_SLOPE_FDS BIT(4)
451 #define LSM6DSL_MASK_TAP_CFG_X_EN BIT(3)
453 #define LSM6DSL_MASK_TAP_CFG_Y_EN BIT(2)
455 #define LSM6DSL_MASK_TAP_CFG_Z_EN BIT(1)
457 #define LSM6DSL_MASK_TAP_CFG_LIR BIT(0)
461 #define LSM6DSL_MASK_TAP_THS_6D_D4D_EN BIT(7)
463 #define LSM6DSL_MASK_TAP_THS_6D_SIXD_THS (BIT(6) | BIT(5))
465 #define LSM6DSL_MASK_TAP_THS_6D_TAP_THS (BIT(4) | BIT(3) | \
466 BIT(2) | BIT(1) | \
467 BIT(0))
471 #define LSM6DSL_MASK_INT_DUR2_DUR (BIT(7) | BIT(6) | \
472 BIT(5) | BIT(4))
474 #define LSM6DSL_MASK_INT_DUR2_QUIET (BIT(3) | BIT(2))
476 #define LSM6DSL_MASK_INT_DUR2_SHOCK (BIT(1) | BIT(0))
480 #define LSM6DSL_MASK_WAKE_UP_THS_SINGLE_DOUBLE_TAP BIT(7)
482 #define LSM6DSL_MASK_WAKE_UP_THS_WK_THS (BIT(5) | BIT(4) | \
483 BIT(3) | BIT(2) | \
484 BIT(1) | BIT(0))
488 #define LSM6DSL_MASK_WAKE_UP_DUR_FF_DUR5 BIT(7)
490 #define LSM6DSL_MASK_WAKE_UP_DUR_WAKE_DUR (BIT(6) | BIT(5))
492 #define LSM6DSL_MASK_WAKE_UP_DUR_TIMER_HR BIT(4)
494 #define LSM6DSL_MASK_WAKE_UP_DUR_SLEEP_DUR (BIT(3) | BIT(2) | \
495 BIT(1) | BIT(0))
499 #define LSM6DSL_MASK_FREE_FALL_DUR (BIT(7) | BIT(6) | \
500 BIT(5) | BIT(4) | \
501 BIT(3))
503 #define LSM6DSL_MASK_FREE_FALL_THS (BIT(2) | BIT(1) | \
504 BIT(0))
508 #define LSM6DSL_MASK_MD1_CFG_INT1_INACT_STATE BIT(7)
510 #define LSM6DSL_MASK_MD1_CFG_INT1_SINGLE_TAP BIT(6)
512 #define LSM6DSL_MASK_MD1_CFG_INT1_WU BIT(5)
514 #define LSM6DSL_MASK_MD1_CFG_INT1_FF BIT(4)
516 #define LSM6DSL_MASK_MD1_CFG_INT1_DOUBLE_TAP BIT(3)
518 #define LSM6DSL_MASK_MD1_CFG_INT1_6D BIT(2)
520 #define LSM6DSL_MASK_MD1_CFG_INT1_TILT BIT(1)
522 #define LSM6DSL_MASK_MD1_CFG_INT1_TIMER BIT(0)
526 #define LSM6DSL_MASK_MD2_CFG_INT2_INACT_STATE BIT(7)
528 #define LSM6DSL_MASK_MD2_CFG_INT2_SINGLE_TAP BIT(6)
530 #define LSM6DSL_MASK_MD2_CFG_INT2_WU BIT(5)
532 #define LSM6DSL_MASK_MD2_CFG_INT2_FF BIT(4)
534 #define LSM6DSL_MASK_MD2_CFG_INT2_DOUBLE_TAP BIT(3)
536 #define LSM6DSL_MASK_MD2_CFG_INT2_6D BIT(2)
538 #define LSM6DSL_MASK_MD2_CFG_INT2_TILT BIT(1)
540 #define LSM6DSL_MASK_MD2_CFG_INT2_IRON BIT(0)