Lines Matching full:7
29 #define LSM6DSL_MASK_FUNC_CFG_EN BIT(7)
30 #define LSM6DSL_SHIFT_FUNC_CFG_EN 7
44 #define LSM6DSL_MASK_FIFO_CTRL1_FTH (BIT(7) | BIT(6) | \
51 #define LSM6DSL_MASK_FIFO_CTRL2_TIMER_PEDO_FIFO_EN BIT(7)
52 #define LSM6DSL_SHIFT_FIFO_CTRL2_TIMER_PEDO_FIFO_EN 7
70 #define LSM6DSL_MASK_FIFO_CTRL4_STOP_ON_FTH BIT(7)
71 #define LSM6DSL_SHIFT_FIFO_CTRL4_STOP_ON_FTH 7
90 #define LSM6DSL_MASK_DRDY_PULSE_CFG_G_DRDY_PULSED BIT(7)
91 #define LSM6DSL_SHIFT_DRDY_PULSE_CFG_G_DRDY_PULSED 7
96 #define LSM6DSL_MASK_INT1_CTRL_STEP_DETECTOR BIT(7)
97 #define LSM6DSL_SHIFT_INT1_CTRL_STEP_DETECTOR 7
114 #define LSM6DSL_MASK_INT2_CTRL_STEP_DELTA BIT(7)
115 #define LSM6DSL_SHIFT_INT2_CTRL_STEP_DELTA 7
135 #define LSM6DSL_MASK_CTRL1_XL_ODR_XL (BIT(7) | BIT(6) | \
144 #define LSM6DSL_MASK_CTRL2_G_ODR_G (BIT(7) | BIT(6) | \
153 #define LSM6DSL_MASK_CTRL3_C_BOOT BIT(7)
154 #define LSM6DSL_SHIFT_CTRL3_C_BOOT 7
171 #define LSM6DSL_MASK_CTRL4_C_DEN_XL_EN BIT(7)
172 #define LSM6DSL_SHIFT_CTRL4_C_DEN_XL_EN 7
187 #define LSM6DSL_MASK_CTRL5_C_ROUNDING (BIT(7) | BIT(6) | \
198 #define LSM6DSL_MASK_CTRL6_C_TRIG_EN BIT(7)
199 #define LSM6DSL_SHIFT_CTRL6_C_TRIG_EN 7
212 #define LSM6DSL_MASK_CTRL7_G_HM_MODE BIT(7)
213 #define LSM6DSL_SHIFT_CTRL7_G_HM_MODE 7
222 #define LSM6DSL_MASK_CTRL8_LPF2_XL_EN BIT(7)
223 #define LSM6DSL_SHIFT_CTRL8_LPF2_XL_EN 7
236 #define LSM6DSL_MASK_CTRL9_XL_DEN_X BIT(7)
237 #define LSM6DSL_SHIFT_CTRL9_XL_DEN_X 7
248 #define LSM6DSL_MASK_CTRL10_C_WRIST_TILT_EN BIT(7)
249 #define LSM6DSL_SHIFT_CTRL10_C_WRIST_TILT_EN 7
264 #define LSM6DSL_MASK_MASTER_CONFIG_DRDY_ON_INT1 BIT(7)
265 #define LSM6DSL_SHIFT_MASTER_CONFIG_DRDY_ON_INT1 7
310 #define LSM6DSL_MASK_D6D_SRC_DEN_DRDY BIT(7)
311 #define LSM6DSL_SHIFT_D6D_SRC_DEN_DRDY 7
364 #define LSM6DSL_MASK_FIFO_STATUS2_WATERM BIT(7)
365 #define LSM6DSL_SHIFT_FIFO_STATUS2_WATERM 7
401 #define LSM6DSL_MASK_FUNC_SRC1_STEP_COUNT_DELTA_IA BIT(7)
402 #define LSM6DSL_SHIFT_FUNC_SRC1_STEP_COUNT_DELTA_IA 7
431 #define LSM6DSL_MASK_WRIST_TILT_IA_XPOS BIT(7)
432 #define LSM6DSL_SHIFT_WRIST_TILT_IA_XPOS 7
445 #define LSM6DSL_MASK_TAP_CFG_INTERRPUTS_ENABLE BIT(7)
446 #define LSM6DSL_SHIFT_TAP_CFG_INTERRPUTS_ENABLE 7
461 #define LSM6DSL_MASK_TAP_THS_6D_D4D_EN BIT(7)
462 #define LSM6DSL_SHIFT_TAP_THS_6D_D4D_EN 7
471 #define LSM6DSL_MASK_INT_DUR2_DUR (BIT(7) | BIT(6) | \
480 #define LSM6DSL_MASK_WAKE_UP_THS_SINGLE_DOUBLE_TAP BIT(7)
481 #define LSM6DSL_SHIFT_WAKE_UP_THS_SINGLE_DOUBLE_TAP 7
488 #define LSM6DSL_MASK_WAKE_UP_DUR_FF_DUR5 BIT(7)
489 #define LSM6DSL_SHIFT_WAKE_UP_DUR_FF_DUR5 7
499 #define LSM6DSL_MASK_FREE_FALL_DUR (BIT(7) | BIT(6) | \
508 #define LSM6DSL_MASK_MD1_CFG_INT1_INACT_STATE BIT(7)
509 #define LSM6DSL_SHIFT_MD1_CFG_INT1_INACT_STATE 7
526 #define LSM6DSL_MASK_MD2_CFG_INT2_INACT_STATE BIT(7)
527 #define LSM6DSL_SHIFT_MD2_CFG_INT2_INACT_STATE 7