Lines Matching +full:5 +full:- +full:7
1 /* sensor_lsm6dsl.h - header file for LSM6DSL accelerometer, gyroscope and
8 * SPDX-License-Identifier: Apache-2.0
29 #define LSM6DSL_MASK_FUNC_CFG_EN BIT(7)
30 #define LSM6DSL_SHIFT_FUNC_CFG_EN 7
31 #define LSM6DSL_MASK_FUNC_CFG_EN_B BIT(5)
32 #define LSM6DSL_SHIFT_FUNC_CFG_EN_B 5
44 #define LSM6DSL_MASK_FIFO_CTRL1_FTH (BIT(7) | BIT(6) | \
45 BIT(5) | BIT(4) | \
51 #define LSM6DSL_MASK_FIFO_CTRL2_TIMER_PEDO_FIFO_EN BIT(7)
52 #define LSM6DSL_SHIFT_FIFO_CTRL2_TIMER_PEDO_FIFO_EN 7
62 #define LSM6DSL_MASK_FIFO_CTRL3_DEC_FIFO_GYRO (BIT(5) | BIT(4) | \
70 #define LSM6DSL_MASK_FIFO_CTRL4_STOP_ON_FTH BIT(7)
71 #define LSM6DSL_SHIFT_FIFO_CTRL4_STOP_ON_FTH 7
74 #define LSM6DSL_MASK_FIFO_CTRL4_DEC_DS4_FIFO (BIT(5) | BIT(4) | \
82 #define LSM6DSL_MASK_FIFO_CTRL5_ODR_FIFO (BIT(6) | BIT(5) | \
90 #define LSM6DSL_MASK_DRDY_PULSE_CFG_G_DRDY_PULSED BIT(7)
91 #define LSM6DSL_SHIFT_DRDY_PULSE_CFG_G_DRDY_PULSED 7
96 #define LSM6DSL_MASK_INT1_CTRL_STEP_DETECTOR BIT(7)
97 #define LSM6DSL_SHIFT_INT1_CTRL_STEP_DETECTOR 7
100 #define LSM6DSL_MASK_INT1_CTRL_FULL_FLAG BIT(5)
101 #define LSM6DSL_SHIFT_INT1_CTRL_FULL_FLAG 5
114 #define LSM6DSL_MASK_INT2_CTRL_STEP_DELTA BIT(7)
115 #define LSM6DSL_SHIFT_INT2_CTRL_STEP_DELTA 7
118 #define LSM6DSL_MASK_INT2_CTRL_FULL_FLAG BIT(5)
119 #define LSM6DSL_SHIFT_INT2_CTRL_FULL_FLAG 5
135 #define LSM6DSL_MASK_CTRL1_XL_ODR_XL (BIT(7) | BIT(6) | \
136 BIT(5) | BIT(4))
144 #define LSM6DSL_MASK_CTRL2_G_ODR_G (BIT(7) | BIT(6) | \
145 BIT(5) | BIT(4))
153 #define LSM6DSL_MASK_CTRL3_C_BOOT BIT(7)
154 #define LSM6DSL_SHIFT_CTRL3_C_BOOT 7
157 #define LSM6DSL_MASK_CTRL3_C_H_LACTIVE BIT(5)
158 #define LSM6DSL_SHIFT_CTRL3_C_H_LACTIVE 5
171 #define LSM6DSL_MASK_CTRL4_C_DEN_XL_EN BIT(7)
172 #define LSM6DSL_SHIFT_CTRL4_C_DEN_XL_EN 7
175 #define LSM6DSL_MASK_CTRL4_C_INT2_ON_INT1 BIT(5)
176 #define LSM6DSL_SHIFT_CTRL4_C_INT2_ON_INT1 5
187 #define LSM6DSL_MASK_CTRL5_C_ROUNDING (BIT(7) | BIT(6) | \
188 BIT(5))
189 #define LSM6DSL_SHIFT_CTRL5_C_ROUNDING 5
198 #define LSM6DSL_MASK_CTRL6_C_TRIG_EN BIT(7)
199 #define LSM6DSL_SHIFT_CTRL6_C_TRIG_EN 7
202 #define LSM6DSL_MASK_CTRL6_C_LVL2_EN BIT(5)
203 #define LSM6DSL_SHIFT_CTRL6_C_LVL2_EN 5
212 #define LSM6DSL_MASK_CTRL7_G_HM_MODE BIT(7)
213 #define LSM6DSL_SHIFT_CTRL7_G_HM_MODE 7
216 #define LSM6DSL_MASK_CTRL7_HPM_G (BIT(5) | BIT(4))
222 #define LSM6DSL_MASK_CTRL8_LPF2_XL_EN BIT(7)
223 #define LSM6DSL_SHIFT_CTRL8_LPF2_XL_EN 7
224 #define LSM6DSL_MASK_CTRL8_HPCF_XL (BIT(6) | BIT(5))
225 #define LSM6DSL_SHIFT_CTRL8_HPCF_XL 5
236 #define LSM6DSL_MASK_CTRL9_XL_DEN_X BIT(7)
237 #define LSM6DSL_SHIFT_CTRL9_XL_DEN_X 7
240 #define LSM6DSL_MASK_CTRL9_XL_DEN_Z BIT(5)
241 #define LSM6DSL_SHIFT_CTRL9_XL_DEN_Z 5
248 #define LSM6DSL_MASK_CTRL10_C_WRIST_TILT_EN BIT(7)
249 #define LSM6DSL_SHIFT_CTRL10_C_WRIST_TILT_EN 7
250 #define LSM6DSL_MASK_CTRL10_C_TIMER_EN BIT(5)
251 #define LSM6DSL_SHIFT_CTRL10_C_TIMER_EN 5
264 #define LSM6DSL_MASK_MASTER_CONFIG_DRDY_ON_INT1 BIT(7)
265 #define LSM6DSL_SHIFT_MASTER_CONFIG_DRDY_ON_INT1 7
280 #define LSM6DSL_MASK_WAKE_UP_SRC_FF_IA BIT(5)
281 #define LSM6DSL_SHIFT_WAKE_UP_SRC_FF_IA 5
296 #define LSM6DSL_MASK_TAP_SRC_SINGLE_TAP BIT(5)
297 #define LSM6DSL_SHIFT_TAP_SRC_SINGLE_TAP 5
310 #define LSM6DSL_MASK_D6D_SRC_DEN_DRDY BIT(7)
311 #define LSM6DSL_SHIFT_D6D_SRC_DEN_DRDY 7
314 #define LSM6DSL_MASK_D6D_SRC_ZH BIT(5)
315 #define LSM6DSL_SHIFT_D6D_SRC_ZH 5
364 #define LSM6DSL_MASK_FIFO_STATUS2_WATERM BIT(7)
365 #define LSM6DSL_SHIFT_FIFO_STATUS2_WATERM 7
368 #define LSM6DSL_MASK_FIFO_STATUS2_FIFO_FULL_SMART BIT(5)
369 #define LSM6DSL_SHIFT_FIFO_STATUS2_FIFO_FULL_SMART 5
401 #define LSM6DSL_MASK_FUNC_SRC1_STEP_COUNT_DELTA_IA BIT(7)
402 #define LSM6DSL_SHIFT_FUNC_SRC1_STEP_COUNT_DELTA_IA 7
405 #define LSM6DSL_MASK_FUNC_SRC1_TILT_IA BIT(5)
406 #define LSM6DSL_SHIFT_FUNC_SRC1_TILT_IA 5
421 #define LSM6DSL_MASK_FUNC_SRC2_SLAVE2_NACK BIT(5)
422 #define LSM6DSL_SHIFT_FUNC_SRC2_SLAVE2_NACK 5
431 #define LSM6DSL_MASK_WRIST_TILT_IA_XPOS BIT(7)
432 #define LSM6DSL_SHIFT_WRIST_TILT_IA_XPOS 7
435 #define LSM6DSL_MASK_WRIST_TILT_IA_YPOS BIT(5)
436 #define LSM6DSL_SHIFT_WRIST_TILT_IA_YPOS 5
445 #define LSM6DSL_MASK_TAP_CFG_INTERRPUTS_ENABLE BIT(7)
446 #define LSM6DSL_SHIFT_TAP_CFG_INTERRPUTS_ENABLE 7
447 #define LSM6DSL_MASK_TAP_CFG_INACT_EN (BIT(6) | BIT(5))
448 #define LSM6DSL_SHIFT_TAP_CFG_INACT_EN 5
461 #define LSM6DSL_MASK_TAP_THS_6D_D4D_EN BIT(7)
462 #define LSM6DSL_SHIFT_TAP_THS_6D_D4D_EN 7
463 #define LSM6DSL_MASK_TAP_THS_6D_SIXD_THS (BIT(6) | BIT(5))
464 #define LSM6DSL_SHIFT_TAP_THS_6D_SIXD_THS 5
471 #define LSM6DSL_MASK_INT_DUR2_DUR (BIT(7) | BIT(6) | \
472 BIT(5) | BIT(4))
480 #define LSM6DSL_MASK_WAKE_UP_THS_SINGLE_DOUBLE_TAP BIT(7)
481 #define LSM6DSL_SHIFT_WAKE_UP_THS_SINGLE_DOUBLE_TAP 7
482 #define LSM6DSL_MASK_WAKE_UP_THS_WK_THS (BIT(5) | BIT(4) | \
488 #define LSM6DSL_MASK_WAKE_UP_DUR_FF_DUR5 BIT(7)
489 #define LSM6DSL_SHIFT_WAKE_UP_DUR_FF_DUR5 7
490 #define LSM6DSL_MASK_WAKE_UP_DUR_WAKE_DUR (BIT(6) | BIT(5))
491 #define LSM6DSL_SHIFT_WAKE_UP_DUAR_WAKE_DUR 5
499 #define LSM6DSL_MASK_FREE_FALL_DUR (BIT(7) | BIT(6) | \
500 BIT(5) | BIT(4) | \
508 #define LSM6DSL_MASK_MD1_CFG_INT1_INACT_STATE BIT(7)
509 #define LSM6DSL_SHIFT_MD1_CFG_INT1_INACT_STATE 7
512 #define LSM6DSL_MASK_MD1_CFG_INT1_WU BIT(5)
513 #define LSM6DSL_SHIFT_MD1_CFG_INT1_WU 5
526 #define LSM6DSL_MASK_MD2_CFG_INT2_INACT_STATE BIT(7)
527 #define LSM6DSL_SHIFT_MD2_CFG_INT2_INACT_STATE 7
530 #define LSM6DSL_MASK_MD2_CFG_INT2_WU BIT(5)
531 #define LSM6DSL_SHIFT_MD2_CFG_INT2_WU 5