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1 /* sensor_lsm6ds0.h - header file for LSM6DS0 accelerometer, gyroscope and
8 * SPDX-License-Identifier: Apache-2.0
18 #define LSM6DS0_REG_ACT_THS 0x04
21 #define LSM6DS0_MASK_ACT_THS_ACT_THS (BIT(6) | BIT(5) | BIT(4) | \
23 BIT(0))
24 #define LSM6DS0_SHIFT_ACT_THS_ACT_THS 0
26 #define LSM6DS0_REG_ACT_DUR 0x05
28 #define LSM6DS0_REG_INT_GEN_CFG_XL 0x06
33 #define LSM6DS0_MASK_INT_GEN_CFG_XL_ZHIE_XL BIT(5)
34 #define LSM6DS0_SHIFT_INT_GEN_CFG_XL_ZHIE_XL 5
43 #define LSM6DS0_MASK_INT_GEN_CFG_XL_XLIE_XL BIT(0)
44 #define LSM6DS0_SHIFT_INT_GEN_CFG_XL_XLIE_XL 0
46 #define LSM6DS0_REG_INT_GEN_THS_X_XL 0x07
47 #define LSM6DS0_REG_INT_GEN_THS_Y_XL 0x08
48 #define LSM6DS0_REG_INT_GEN_THS_Z_XL 0x09
49 #define LSM6DS0_REG_INT_GEN_DUR_XL 0x0A
50 #define LSM6DS0_REG_REFERENCE_G 0x0B
52 #define LSM6DS0_REG_INT_CTRL 0x0C
57 #define LSM6DS0_MASK_INT_CTRL_INT_FSS5 BIT(5)
58 #define LSM6DS0_SHIFT_INT_CTRL_INT_FSS5 5
67 #define LSM6DS0_MASK_INT_CTRL_INT_DRDY_XL BIT(0)
68 #define LSM6DS0_SHIFT_INT_CTRL_INT_DRDY_XL 0
70 #define LSM6DS0_REG_WHO_AM_I 0x0F
71 #define LSM6DS0_VAL_WHO_AM_I 0x68
73 #define LSM6DS0_REG_CTRL_REG1_G 0x10
74 #define LSM6DS0_MASK_CTRL_REG1_G_ODR_G (BIT(7) | BIT(6) | BIT(5))
75 #define LSM6DS0_SHIFT_CTRL_REG1_G_ODR_G 5
78 #define LSM6DS0_MASK_CTRL_REG1_G_BW_G (BIT(1) | BIT(0))
79 #define LSM6DS0_SHIFT_CTRL_REG1_G_BW_G 0
81 #define LSM6DS0_REG_CTRL_REG2_G 0x11
84 #define LSM6DS0_MASK_CTRL_REG2_G_OUT_SEL (BIT(1) | BIT(0))
85 #define LSM6DS0_SHIFT_CTRL_REG2_G_OUT_SEL 0
87 #define LSM6DS0_REG_CTRL_REG3_G 0x12
93 BIT(0))
94 #define LSM6DS0_SHIFT_CTRL_REG3_G_HPCF_G 0
96 #define LSM6DS0_REG_ORIENT_CFG_G 0x13
97 #define LSM6DS0_MASK_ORIENT_CFG_G_SIGNX_G BIT(5)
98 #define LSM6DS0_SHIFT_ORIENT_CFG_G_SIGNX_G 5
103 #define LSM6DS0_MASK_ORIENT_CFG_ORIENT (BIT(2) | BIT(1) | BIT(0))
104 #define LSM6DS0_SHIFT_ORIENT_CFG_ORIENT 0
106 #define LSM6DS0_REG_INT_GEN_SRC_G 0x14
109 #define LSM6DS0_MASK_INT_GEN_SRC_G_ZH_G BIT(5)
110 #define LSM6DS0_SHIFT_INT_GEN_SRC_G_ZH_G 5
119 #define LSM6DS0_MASK_INT_GEN_SRC_G_XL_G BIT(0)
120 #define LSM6DS0_SHIFT_INT_GEN_SRC_G_XL_G 0
122 #define LSM6DS0_REG_OUT_TEMP_L 0x15
123 #define LSM6DS0_REG_OUT_TEMP_H 0x16
125 #define LSM6DS0_REG_STATUS_REG_G 0x17
128 #define LSM6DS0_MASK_STATUS_REG_G_IG_G BIT(5)
129 #define LSM6DS0_SHIFT_STATUS_REG_G_IG_G 5
138 #define LSM6DS0_MASK_STATUS_REG_G_XLDA BIT(0)
139 #define LSM6DS0_SHIFT_STATUS_REG_G_XLDA 0
141 #define LSM6DS0_REG_OUT_X_L_G 0x18
142 #define LSM6DS0_REG_OUT_X_H_G 0x19
143 #define LSM6DS0_REG_OUT_Y_L_G 0x1A
144 #define LSM6DS0_REG_OUT_Y_H_G 0x1B
145 #define LSM6DS0_REG_OUT_Z_L_G 0x1C
146 #define LSM6DS0_REG_OUT_Z_H_G 0x1D
148 #define LSM6DS0_REG_CTRL_REG4 0x1E
149 #define LSM6DS0_MASK_CTRL_REG4_ZEN_G BIT(5)
150 #define LSM6DS0_SHIFT_CTRL_REG4_ZEN_G 5
157 #define LSM6DS0_MASK_CTRL_REG4_4D_XL1 BIT(0)
158 #define LSM6DS0_SHIFT_CTRL_REG4_4D_XL1 0
160 #define LSM6DS0_REG_CTRL_REG5_XL 0x1F
163 #define LSM6DS0_MASK_CTRL_REG5_XL_ZEN_XL BIT(5)
164 #define LSM6DS0_SHIFT_CTRL_REG5_XL_ZEN_XL 5
170 #define LSM6DS0_REG_CTRL_REG6_XL 0x20
171 #define LSM6DS0_MASK_CTRL_REG6_XL_ODR_XL (BIT(7) | BIT(6) | BIT(5))
172 #define LSM6DS0_SHIFT_CTRL_REG6_XL_ODR_XL 5
177 #define LSM6DS0_MASK_CTRL_REG6_XL_BW_XL (BIT(1) | BIT(0))
178 #define LSM6DS0_SHIFT_CTRL_REG6_XL_BW_XL 0
180 #define LSM6DS0_REG_CTRL_REG7_XL 0x21
183 #define LSM6DS0_MASK_CTRL_REG7_XL_DCF (BIT(6) | BIT(5))
184 #define LSM6DS0_SHIFT_CTRL_REG7_XL_DCF 5
187 #define LSM6DS0_MASK_CTRL_REG7_XL_HPIS1 BIT(0)
188 #define LSM6DS0_SHIFT_CTRL_REG7_XL_HPIS 0
190 #define LSM6DS0_REG_CTRL_REG8 0x22
195 #define LSM6DS0_MASK_CTRL_REG8_H_LACTIVE BIT(5)
196 #define LSM6DS0_SHIFT_CTRL_REG8_H_LACTIVE 5
205 #define LSM6DS0_MASK_CTRL_REG8_SW_RESET BIT(0)
206 #define LSM6DS0_SHIFT_CTRL_REG8_SW_RESET 0
208 #define LSM6DS0_REG_CTRL_REG9 0x23
219 #define LSM6DS0_MASK_CTRL_REG9_STOP_ON_FTH BIT(0)
220 #define LSM6DS0_SHIFT_CTRL_REG9_STOP_ON_FTH 0
222 #define LSM6DS0_REG_CTRL_REG10 0x24
225 #define LSM6DS0_MASK_CTRL_REG10_ST_XL BIT(0)
226 #define LSM6DS0_SHIFT_CTRL_REG10_ST_XL 0
228 #define LSM6DS0_REG_INT_GEN_SRC_XL 0x26
231 #define LSM6DS0_MASK_INT_GEN_SRC_XL_ZH_XL BIT(5)
232 #define LSM6DS0_SHIFT_INT_GEN_SRC_XL_ZH_XL 5
241 #define LSM6DS0_MASK_INT_GEN_SRC_XL_XL_XL BIT(0)
242 #define LSM6DS0_SHIFT_INT_GEN_SRC_XL_XL_XL 0
244 #define LSM6DS0_REG_STATUS_REG_XL 0x27
247 #define LSM6DS0_MASK_STATUS_REG_XL_IG_G BIT(5)
248 #define LSM6DS0_SHIFT_STATUS_REG_XL_IG_G 5
257 #define LSM6DS0_MASK_STATUS_REG_XL_XLDA BIT(0)
258 #define LSM6DS0_SHIFT_STATUS_REG_XL_XLDA 0
260 #define LSM6DS0_REG_OUT_X_L_XL 0x28
261 #define LSM6DS0_REG_OUT_X_H_XL 0x29
262 #define LSM6DS0_REG_OUT_Y_L_XL 0x2A
263 #define LSM6DS0_REG_OUT_Y_H_XL 0x2B
264 #define LSM6DS0_REG_OUT_Z_L_XL 0x2C
265 #define LSM6DS0_REG_OUT_Z_H_XL 0x2D
267 #define LSM6DS0_REG_FIFO_CTRL 0x2E
268 #define LSM6DS0_MASK_FIFO_CTRL_FMODE (BIT(7) | BIT(6) | BIT(5))
269 #define LSM6DS0_SHIFT_FIFO_CTRL_FMODE 5
271 BIT(1) | BIT(0))
272 #define LSM6DS0_SHIFT_FIFO_CTRL_FTH 0
274 #define LSM6DS0_REG_FIFO_SRC 0x2F
279 #define LSM6DS0_MASK_FIFO_SRC_FSS (BIT(5) | BIT(4) | BIT(3) | \
280 BIT(2) | BIT(1) | BIT(0))
281 #define LSM6DS0_SHIFT_FIFO_SRC_FSS 0
283 #define LSM6DS0_REG_INT_GEN_CFG_G 0x30
288 #define LSM6DS0_MASK_INT_GEN_CFG_G_ZHIE_G BIT(5)
289 #define LSM6DS0_SHIFT_INT_GEN_CFG_G_ZHIE_G 5
298 #define LSM6DS0_MASK_INT_GEN_CFG_G_XLIE_G BIT(0)
299 #define LSM6DS0_SHIFT_INT_GEN_CFG_G_XLIE_G 0
301 #define LSM6DS0_REG_INT_GEN_THS_XH_G 0x31
305 #define LSM6DS0_REG_INT_GEN_THS_XL_G 0x32
306 #define LSM6DS0_REG_INT_GEN_THS_YH_G 0x33
307 #define LSM6DS0_REG_INT_GEN_THS_YL_G 0x34
308 #define LSM6DS0_REG_INT_GEN_THS_ZH_G 0x35
309 #define LSM6DS0_REG_INT_GEN_THS_ZL_G 0x36
311 #define LSM6DS0_REG_INT_GEN_DUR_G 0x37
322 #define LSM6DS0_ACCEL_ENABLE_X_AXIS 0
328 #define LSM6DS0_ACCEL_ENABLE_Y_AXIS 0
334 #define LSM6DS0_ACCEL_ENABLE_Z_AXIS 0
340 #define LSM6DS0_GYRO_ENABLE_X_AXIS 0
346 #define LSM6DS0_GYRO_ENABLE_Y_AXIS 0
352 #define LSM6DS0_GYRO_ENABLE_Z_AXIS 0
366 #define LSM6DS0_DEFAULT_ACCEL_FULLSCALE 0
379 #if CONFIG_LSM6DS0_ACCEL_SAMPLING_RATE == 0
396 #define LSM6DS0_DEFAULT_ACCEL_SAMPLING_RATE 0
406 #define LSM6DS0_DEFAULT_ACCEL_SAMPLING_RATE 5
420 #define LSM6DS0_DEFAULT_GYRO_FULLSCALE 0
430 #if CONFIG_LSM6DS0_GYRO_SAMPLING_RATE == 0
447 #define LSM6DS0_DEFAULT_GYRO_SAMPLING_RATE 0
457 #define LSM6DS0_DEFAULT_GYRO_SAMPLING_RATE 5