Lines Matching full:5
26 #define LPS22HB_MASK_INTERRUPT_CFG_AUTOZERO BIT(5)
27 #define LPS22HB_SHIFT_INTERRUPT_CFG_AUTOZERO 5
43 #define LPS22HB_MASK_CTRL_REG1_ODR (BIT(6) | BIT(5) | BIT(4))
59 #define LPS22HB_MASK_CTRL_REG2_STOP_ON_FTH BIT(5)
60 #define LPS22HB_SHIFT_CTRL_REG2_STOP_ON_FTH 5
75 #define LPS22HB_MASK_CTRL_REG3_F_FSS5 BIT(5)
76 #define LPS22HB_SHIFT_CTRL_REG3_F_FFS5 5
87 #define LPS22HB_MASK_FIFO_CTRL_F_MODE (BIT(7) | BIT(6) | BIT(5))
88 #define LPS22HB_SHIFT_FIFO_CTRL_F_MODE 5
117 #define LPS22HB_MASK_FIFO_STATUS_EMPTY_FIFO BIT(5)
118 #define LPS22HB_SHIFT_FIFO_STATUS_EMPTY_FIFO 5
124 #define LPS22HB_MASK_STATUS_P_OR BIT(5)
125 #define LPS22HB_SHIFT_STATUS_P_OR 5
152 #define LPS22HB_DEFAULT_SAMPLING_RATE 5