Lines Matching +full:gyro +full:- +full:odr

1 /* ST Microelectronics I3G4250D gyro driver
5 * SPDX-License-Identifier: Apache-2.0
28 struct i3g4250d_data *i3g4250d = dev->data; in i3g4250d_sample_fetch()
34 return -ENOTSUP; in i3g4250d_sample_fetch()
37 ret = i3g4250d_flag_data_ready_get(i3g4250d->ctx, &reg); in i3g4250d_sample_fetch()
42 ret = i3g4250d_angular_rate_raw_get(i3g4250d->ctx, buf); in i3g4250d_sample_fetch()
48 memcpy(i3g4250d->angular_rate, buf, sizeof(i3g4250d->angular_rate)); in i3g4250d_sample_fetch()
55 val->val1 = (int16_t)(raw_value * RAW_TO_MICRODEGREEPERSEC / 1000000LL); in i3g4250d_convert()
56 val->val2 = (int16_t)(raw_value * RAW_TO_MICRODEGREEPERSEC) % 1000000LL; in i3g4250d_convert()
90 struct i3g4250d_data *i3g4250d = dev->data; in i3g4250d_channel_get()
100 i3g4250d_channel_convert(chan, i3g4250d->angular_rate, val); in i3g4250d_channel_get()
103 return -ENOTSUP; in i3g4250d_channel_get()
109 double odr = sensor_value_to_double(val); in gyr_odr_to_reg() local
112 if ((odr > 0.0) && (odr < 100.0)) { in gyr_odr_to_reg()
114 } else if ((odr >= 100.0) && (odr < 200.0)) { in gyr_odr_to_reg()
116 } else if ((odr >= 200.0) && (odr < 400.0)) { in gyr_odr_to_reg()
118 } else if ((odr >= 400.0) && (odr < 800.0)) { in gyr_odr_to_reg()
120 } else if (odr >= 800.0) { in gyr_odr_to_reg()
131 struct i3g4250d_data *i3g4250d = dev->data; in i3g4250d_config_gyro()
137 return i3g4250d_data_rate_set(i3g4250d->ctx, dr_reg); in i3g4250d_config_gyro()
139 LOG_ERR("Gyro attribute not supported"); in i3g4250d_config_gyro()
143 return -ENOTSUP; in i3g4250d_config_gyro()
158 return -ENOTSUP; in i3g4250d_attr_set()
169 struct i3g4250d_data *i3g4250d = dev->data; in i3g4250d_init()
178 ret = i3g4250d_device_id_get(i3g4250d->ctx, &wai); in i3g4250d_init()
185 return -EIO; in i3g4250d_init()
188 /* Configure filtering chain - Gyroscope - High Pass */ in i3g4250d_init()
189 ret = i3g4250d_filter_path_set(i3g4250d->ctx, I3G4250D_LPF1_HP_ON_OUT); in i3g4250d_init()
195 ret = i3g4250d_hp_bandwidth_set(i3g4250d->ctx, I3G4250D_HP_LEVEL_3); in i3g4250d_init()
202 ret = i3g4250d_data_rate_set(i3g4250d->ctx, I3G4250D_ODR_100Hz); in i3g4250d_init()