Lines Matching +full:0 +full:x01 +full:- +full:negative

6  * SPDX-License-Identifier: Apache-2.0
21 #define JC42_REG_CONFIG      0x01
22 #define JC42_REG_UPPER_LIMIT 0x02
23 #define JC42_REG_LOWER_LIMIT 0x03
24 #define JC42_REG_CRITICAL    0x04
25 #define JC42_REG_TEMP_AMB    0x05
29  * * Bit 0 controls alert signal output mode
38  * * Bits 9-10 control threshold hysteresis
40 #define JC42_CFG_ALERT_MODE_INT BIT(0)
46  * * Bits 0..11 encode the temperature in a 2s complement signed value
48  * * Bit 12 is set to indicate a negative temperature
55 #define JC42_TEMP_ABS_MASK  ((uint16_t)(JC42_TEMP_SIGN_BIT - 1U))
60 #define JC42_REG_RESOLUTION 0x08
108 	/* Get the 12-bit 2s complement value */  in jc42_temp_reg_from_signed()
111 	if (temp < 0) {  in jc42_temp_reg_from_signed()
125 		/* Convert 12-bit 2s complement to signed negative  in jc42_temp_signed_from_reg()
128 		rv = -(1U + (rv ^ JC42_TEMP_ABS_MASK));  in jc42_temp_signed_from_reg()