Lines Matching +full:0 +full:x02
22 #define BMI270_REG_CHIP_ID 0x00
23 #define BMI270_REG_ERROR 0x02
24 #define BMI270_REG_STATUS 0x03
25 #define BMI270_REG_AUX_X_LSB 0x04
26 #define BMI270_REG_ACC_X_LSB 0x0C
27 #define BMI270_REG_GYR_X_LSB 0x12
28 #define BMI270_REG_SENSORTIME_0 0x18
29 #define BMI270_REG_EVENT 0x1B
30 #define BMI270_REG_INT_STATUS_0 0x1C
31 #define BMI270_REG_SC_OUT_0 0x1E
32 #define BMI270_REG_WR_GEST_ACT 0x20
33 #define BMI270_REG_INTERNAL_STATUS 0x21
34 #define BMI270_REG_TEMPERATURE_0 0x22
35 #define BMI270_REG_FIFO_LENGTH_0 0x24
36 #define BMI270_REG_FIFO_DATA 0x26
37 #define BMI270_REG_FEAT_PAGE 0x2F
38 #define BMI270_REG_FEATURES_0 0x30
39 #define BMI270_REG_ACC_CONF 0x40
40 #define BMI270_REG_ACC_RANGE 0x41
41 #define BMI270_REG_GYR_CONF 0x42
42 #define BMI270_REG_GYR_RANGE 0x43
43 #define BMI270_REG_AUX_CONF 0x44
44 #define BMI270_REG_FIFO_DOWNS 0x45
45 #define BMI270_REG_FIFO_WTM_0 0x46
46 #define BMI270_REG_FIFO_CONFIG_0 0x48
47 #define BMI270_REG_SATURATION 0x4A
48 #define BMI270_REG_AUX_DEV_ID 0x4B
49 #define BMI270_REG_AUX_IF_CONF 0x4C
50 #define BMI270_REG_AUX_RD_ADDR 0x4D
51 #define BMI270_REG_AUX_WR_ADDR 0x4E
52 #define BMI270_REG_AUX_WR_DATA 0x4F
53 #define BMI270_REG_ERR_REG_MSK 0x52
54 #define BMI270_REG_INT1_IO_CTRL 0x53
55 #define BMI270_REG_INT2_IO_CTRL 0x54
56 #define BMI270_REG_INT_LATCH 0x55
57 #define BMI270_REG_INT1_MAP_FEAT 0x56
58 #define BMI270_REG_INT2_MAP_FEAT 0x57
59 #define BMI270_REG_INT_MAP_DATA 0x58
60 #define BMI270_REG_INIT_CTRL 0x59
61 #define BMI270_REG_INIT_ADDR_0 0x5B
62 #define BMI270_REG_INIT_DATA 0x5E
63 #define BMI270_REG_INTERNAL_ERROR 0x5F
64 #define BMI270_REG_AUX_IF_TRIM 0x68
65 #define BMI270_REG_GYR_CRT_CONF 0x69
66 #define BMI270_REG_NVM_CONF 0x6A
67 #define BMI270_REG_IF_CONF 0x6B
68 #define BMI270_REG_DRV 0x6C
69 #define BMI270_REG_ACC_SELF_TEST 0x6D
70 #define BMI270_REG_GYR_SELF_TEST 0x6E
71 #define BMI270_REG_NV_CONF 0x70
72 #define BMI270_REG_OFFSET_0 0x71
73 #define BMI270_REG_PWR_CONF 0x7C
74 #define BMI270_REG_PWR_CTRL 0x7D
75 #define BMI270_REG_CMD 0x7E
76 #define BMI270_REG_MASK GENMASK(6, 0)
78 #define BMI270_ANYMO_1_DURATION_POS 0
87 #define BMI270_ANYMO_2_THRESHOLD_POS 0
93 #define BMI270_ANYMO_2_OUT_CONF_OFF (0x00 << BMI270_ANYMO_2_OUT_CONF_POS)
94 #define BMI270_ANYMO_2_OUT_CONF_BIT_0 (0x01 << BMI270_ANYMO_2_OUT_CONF_POS)
95 #define BMI270_ANYMO_2_OUT_CONF_BIT_1 (0x02 << BMI270_ANYMO_2_OUT_CONF_POS)
96 #define BMI270_ANYMO_2_OUT_CONF_BIT_2 (0x03 << BMI270_ANYMO_2_OUT_CONF_POS)
97 #define BMI270_ANYMO_2_OUT_CONF_BIT_3 (0x04 << BMI270_ANYMO_2_OUT_CONF_POS)
98 #define BMI270_ANYMO_2_OUT_CONF_BIT_4 (0x05 << BMI270_ANYMO_2_OUT_CONF_POS)
99 #define BMI270_ANYMO_2_OUT_CONF_BIT_5 (0x06 << BMI270_ANYMO_2_OUT_CONF_POS)
100 #define BMI270_ANYMO_2_OUT_CONF_BIT_6 (0x07 << BMI270_ANYMO_2_OUT_CONF_POS)
101 #define BMI270_ANYMO_2_OUT_CONF_BIT_8 (0x08 << BMI270_ANYMO_2_OUT_CONF_POS)
103 #define BMI270_INT_IO_CTRL_LVL BIT(1) /* Output level (0 = active low, 1 = active high) */
104 #define BMI270_INT_IO_CTRL_OD BIT(2) /* Open-drain (0 = push-pull, 1 = open-drain)*/
109 #define BMI270_INT_MAP_SIG_MOTION BIT(0)
117 #define BMI270_INT_MAP_DATA_FFULL_INT1 BIT(0)
128 #define BMI270_CHIP_ID 0x24
130 #define BMI270_CMD_G_TRIGGER 0x02
131 #define BMI270_CMD_USR_GAIN 0x03
132 #define BMI270_CMD_NVM_PROG 0xA0
134 #define BMI270_CMD_SOFT_RESET 0xB6
144 #define BMI270_PREPARE_CONFIG_LOAD 0x00
145 #define BMI270_COMPLETE_CONFIG_LOAD 0x01
147 #define BMI270_INST_MESSAGE_MSK 0x0F
148 #define BMI270_INST_MESSAGE_NOT_INIT 0x00
149 #define BMI270_INST_MESSAGE_INIT_OK 0x01
150 #define BMI270_INST_MESSAGE_INIT_ERR 0x02
151 #define BMI270_INST_MESSAGE_DRV_ERR 0x03
152 #define BMI270_INST_MESSAGE_SNS_STOP 0x04
153 #define BMI270_INST_MESSAGE_NVM_ERR 0x05
154 #define BMI270_INST_MESSAGE_STRTUP_ERR 0x06
155 #define BMI270_INST_MESSAGE_COMPAT_ERR 0x07
157 #define BMI270_INST_AXES_REMAP_ERROR 0x20
158 #define BMI270_INST_ODR_50HZ_ERROR 0x40
160 #define BMI270_PWR_CONF_ADV_PWR_SAVE_MSK 0x01
161 #define BMI270_PWR_CONF_ADV_PWR_SAVE_EN 0x01
162 #define BMI270_PWR_CONF_ADV_PWR_SAVE_DIS 0x00
164 #define BMI270_PWR_CONF_FIFO_SELF_WKUP_MSK 0x02
165 #define BMI270_PWR_CONF_FIFO_SELF_WKUP_POS 0x01
166 #define BMI270_PWR_CONF_FIFO_SELF_WKUP_EN 0x01
167 #define BMI270_PWR_CONF_FIFO_SELF_WKUP_DIS 0x00
169 #define BMI270_PWR_CONF_FUP_EN_MSK 0x04
170 #define BMI270_PWR_CONF_FUP_EN_POS 0x02
171 #define BMI270_PWR_CONF_FUP_EN 0x01
172 #define BMI270_PWR_CONF_FUP_DIS 0x00
174 #define BMI270_PWR_CTRL_MSK 0x0F
175 #define BMI270_PWR_CTRL_AUX_EN 0x01
176 #define BMI270_PWR_CTRL_GYR_EN 0x02
177 #define BMI270_PWR_CTRL_ACC_EN 0x04
178 #define BMI270_PWR_CTRL_TEMP_EN 0x08
180 #define BMI270_ACC_ODR_MSK 0x0F
181 #define BMI270_ACC_ODR_25D32_HZ 0x01
182 #define BMI270_ACC_ODR_25D16_HZ 0x02
183 #define BMI270_ACC_ODR_25D8_HZ 0x03
184 #define BMI270_ACC_ODR_25D4_HZ 0x04
185 #define BMI270_ACC_ODR_25D2_HZ 0x05
186 #define BMI270_ACC_ODR_25_HZ 0x06
187 #define BMI270_ACC_ODR_50_HZ 0x07
188 #define BMI270_ACC_ODR_100_HZ 0x08
189 #define BMI270_ACC_ODR_200_HZ 0x09
190 #define BMI270_ACC_ODR_400_HZ 0x0A
191 #define BMI270_ACC_ODR_800_HZ 0x0B
192 #define BMI270_ACC_ODR_1600_HZ 0x0C
194 #define BMI270_ACC_BWP_MSK 0x30
196 #define BMI270_ACC_BWP_OSR4_AVG1 0x00
197 #define BMI270_ACC_BWP_OSR2_AVG2 0x01
198 #define BMI270_ACC_BWP_NORM_AVG4 0x02
199 #define BMI270_ACC_BWP_CIC_AVG8 0x03
200 #define BMI270_ACC_BWP_RES_AVG16 0x04
201 #define BMI270_ACC_BWP_RES_AVG32 0x05
202 #define BMI270_ACC_BWP_RES_AVG64 0x06
203 #define BMI270_ACC_BWP_RES_AVG128 0x07
205 #define BMI270_ACC_FILT_MSK 0x80
207 #define BMI270_ACC_FILT_PWR_OPT 0x00
208 #define BMI270_ACC_FILT_PERF_OPT 0x01
210 #define BMI270_ACC_RANGE_MSK 0x03
211 #define BMI270_ACC_RANGE_2G 0x00
212 #define BMI270_ACC_RANGE_4G 0x01
213 #define BMI270_ACC_RANGE_8G 0x02
214 #define BMI270_ACC_RANGE_16G 0x03
216 #define BMI270_GYR_ODR_MSK 0x0F
217 #define BMI270_GYR_ODR_25_HZ 0x06
218 #define BMI270_GYR_ODR_50_HZ 0x07
219 #define BMI270_GYR_ODR_100_HZ 0x08
220 #define BMI270_GYR_ODR_200_HZ 0x09
221 #define BMI270_GYR_ODR_400_HZ 0x0A
222 #define BMI270_GYR_ODR_800_HZ 0x0B
223 #define BMI270_GYR_ODR_1600_HZ 0x0C
224 #define BMI270_GYR_ODR_3200_HZ 0x0D
226 #define BMI270_GYR_BWP_MSK 0x30
228 #define BMI270_GYR_BWP_OSR4 0x00
229 #define BMI270_GYR_BWP_OSR2 0x01
230 #define BMI270_GYR_BWP_NORM 0x02
232 #define BMI270_GYR_FILT_NOISE_MSK 0x40
234 #define BMI270_GYR_FILT_NOISE_PWR 0x00
235 #define BMI270_GYR_FILT_NOISE_PERF 0x01
237 #define BMI270_GYR_FILT_MSK 0x80
239 #define BMI270_GYR_FILT_PWR_OPT 0x00
240 #define BMI270_GYR_FILT_PERF_OPT 0x01
242 #define BMI270_GYR_RANGE_MSK 0x07
243 #define BMI270_GYR_RANGE_2000DPS 0x00
244 #define BMI270_GYR_RANGE_1000DPS 0x01
245 #define BMI270_GYR_RANGE_500DPS 0x02
246 #define BMI270_GYR_RANGE_250DPS 0x03
247 #define BMI270_GYR_RANGE_125DPS 0x04
249 #define BMI270_GYR_OIS_RANGE_MSK 0x80
251 #define BMI270_GYR_OIS_RANGE_250DPS 0x00
252 #define BMI270_GYR_OIS_RANGE_2000DPS 0x01