Lines Matching +full:data +full:- +full:shift
3 * SPDX-License-Identifier: Apache-2.0
28 /* Holds register data. */
38 struct bma4xx_emul_data *data = target->data; in bma4xx_emul_set_reg() local
41 memcpy(data->regs + reg_addr, val, count); in bma4xx_emul_set_reg()
46 struct bma4xx_emul_data *data = target->data; in bma4xx_emul_get_reg() local
49 memcpy(val, data->regs + reg_addr, count); in bma4xx_emul_get_reg()
55 struct bma4xx_emul_data *data = target->data; in bma4xx_emul_get_interrupt_config() local
57 *int1_io_ctrl = data->regs[BMA4XX_REG_INT1_IO_CTRL]; in bma4xx_emul_get_interrupt_config()
58 *latched_mode = data->regs[BMA4XX_REG_INT_LATCH]; in bma4xx_emul_get_interrupt_config()
59 return data->regs[BMA4XX_REG_INT_MAP_DATA]; in bma4xx_emul_get_interrupt_config()
71 struct bma4xx_emul_data *data = target->data; in bma4xx_emul_write_byte() local
74 LOG_ERR("multi-byte writes are not supported"); in bma4xx_emul_write_byte()
75 return -ENOTSUP; in bma4xx_emul_write_byte()
82 return -EINVAL; in bma4xx_emul_write_byte()
84 data->regs[reg] = val & GENMASK(1, 0); in bma4xx_emul_write_byte()
89 return -EINVAL; in bma4xx_emul_write_byte()
91 data->regs[reg] = val; in bma4xx_emul_write_byte()
98 return -EINVAL; in bma4xx_emul_write_byte()
100 data->regs[reg] = (val & BMA4XX_FIFO_ACC_EN) != 0; in bma4xx_emul_write_byte()
103 data->regs[reg] = val; in bma4xx_emul_write_byte()
108 return -EINVAL; in bma4xx_emul_write_byte()
110 data->regs[reg] = (val & 1) == 1; in bma4xx_emul_write_byte()
113 data->regs[reg] = val; in bma4xx_emul_write_byte()
118 return -EINVAL; in bma4xx_emul_write_byte()
120 data->regs[reg] = val; in bma4xx_emul_write_byte()
125 data->regs[reg] = val; in bma4xx_emul_write_byte()
130 return -ENOTSUP; in bma4xx_emul_write_byte()
132 data->regs[reg] = (val & BMA4XX_BIT_ACC_EN) != 0; in bma4xx_emul_write_byte()
136 data->regs[BMA4XX_REG_FIFO_DATA] = 0; in bma4xx_emul_write_byte()
137 data->regs[BMA4XX_REG_FIFO_LENGTH_0] = 0; in bma4xx_emul_write_byte()
138 data->regs[BMA4XX_REG_FIFO_LENGTH_1] = 0; in bma4xx_emul_write_byte()
145 return -ENOTSUP; in bma4xx_emul_write_byte()
150 struct bma4xx_emul_data *data = target->data; in bma4xx_emul_init() local
152 data->regs[BMA4XX_REG_CHIP_ID] = BMA4XX_CHIP_ID_BMA422; in bma4xx_emul_init()
153 data->regs[BMA4XX_REG_ACCEL_RANGE] = BMA4XX_RANGE_4G; in bma4xx_emul_init()
166 i2c_dump_msgs_rw(target->dev, msgs, num_msgs, addr, false); in bma4xx_emul_transfer_i2c()
168 if (msgs->flags & I2C_MSG_READ) { in bma4xx_emul_transfer_i2c()
170 return -EIO; in bma4xx_emul_transfer_i2c()
172 if (msgs->len != 1) { in bma4xx_emul_transfer_i2c()
173 LOG_ERR("Unexpected msg0 length %d", msgs->len); in bma4xx_emul_transfer_i2c()
174 return -EIO; in bma4xx_emul_transfer_i2c()
177 uint32_t reg = msgs->buf[0]; in bma4xx_emul_transfer_i2c()
180 if (msgs->flags & I2C_MSG_READ) { in bma4xx_emul_transfer_i2c()
181 /* Reads from regs in target->data to msgs->buf */ in bma4xx_emul_transfer_i2c()
182 bma4xx_emul_read_byte(target, reg, msgs->buf, msgs->len); in bma4xx_emul_transfer_i2c()
184 /* Writes msgs->buf[0] to regs in target->data */ in bma4xx_emul_transfer_i2c()
185 bma4xx_emul_write_byte(target, reg, msgs->buf[0], msgs->len); in bma4xx_emul_transfer_i2c()
191 void bma4xx_emul_set_accel_data(const struct emul *target, q31_t value, int8_t shift, int8_t reg) in bma4xx_emul_set_accel_data() argument
194 struct bma4xx_emul_data *data = target->data; in bma4xx_emul_set_accel_data() local
196 /* floor(9.80665 * 2^(31−4)) q31_t in (-2^4, 2^4) => range_g = shift of 4 */ in bma4xx_emul_set_accel_data()
203 /* 0x00 -> +/-2g; 0x01 -> +/-4g; 0x02 -> +/-8g; 0x03 -> +/- 16g; */ in bma4xx_emul_set_accel_data()
204 int64_t accel_range = (2 << data->regs[BMA4XX_REG_ACCEL_RANGE]); in bma4xx_emul_set_accel_data()
206 unshifted = shift < 0 ? ((int64_t)value >> -shift) : ((int64_t)value << shift); in bma4xx_emul_set_accel_data()
212 reg_val = CLAMP(intermediate, -2048, 2047); in bma4xx_emul_set_accel_data()
214 /* lsb register uses top 12 of 16 bits to hold value so shift by 4 to fill it */ in bma4xx_emul_set_accel_data()
215 data->regs[reg] = FIELD_GET(GENMASK(3, 0), reg_val) << 4; in bma4xx_emul_set_accel_data()
216 data->regs[reg + 1] = FIELD_GET(GENMASK(11, 4), reg_val); in bma4xx_emul_set_accel_data()
220 const q31_t *value, int8_t shift) in bma4xx_emul_backend_set_channel() argument
223 if (!target || !target->data) { in bma4xx_emul_backend_set_channel()
224 return -EINVAL; in bma4xx_emul_backend_set_channel()
227 struct bma4xx_emul_data *data = target->data; in bma4xx_emul_backend_set_channel() local
231 bma4xx_emul_set_accel_data(target, value[0], shift, BMA4XX_REG_DATA_8); in bma4xx_emul_backend_set_channel()
234 bma4xx_emul_set_accel_data(target, value[0], shift, BMA4XX_REG_DATA_10); in bma4xx_emul_backend_set_channel()
237 bma4xx_emul_set_accel_data(target, value[0], shift, BMA4XX_REG_DATA_12); in bma4xx_emul_backend_set_channel()
240 bma4xx_emul_set_accel_data(target, value[0], shift, BMA4XX_REG_DATA_8); in bma4xx_emul_backend_set_channel()
241 bma4xx_emul_set_accel_data(target, value[1], shift, BMA4XX_REG_DATA_10); in bma4xx_emul_backend_set_channel()
242 bma4xx_emul_set_accel_data(target, value[2], shift, BMA4XX_REG_DATA_12); in bma4xx_emul_backend_set_channel()
244 return -ENOTSUP; in bma4xx_emul_backend_set_channel()
247 /* Set data ready flag */ in bma4xx_emul_backend_set_channel()
248 data->regs[BMA4XX_REG_INT_STAT_1] |= BMA4XX_ACC_DRDY_INT; in bma4xx_emul_backend_set_channel()
255 q31_t *upper, q31_t *epsilon, int8_t *shift) in bma4xx_emul_backend_get_sample_range() argument
257 if (!lower || !upper || !epsilon || !shift) { in bma4xx_emul_backend_get_sample_range()
258 return -EINVAL; in bma4xx_emul_backend_get_sample_range()
268 return -ENOTSUP; in bma4xx_emul_backend_get_sample_range()
271 struct bma4xx_emul_data *data = target->data; in bma4xx_emul_backend_get_sample_range() local
273 switch (data->regs[BMA4XX_REG_ACCEL_RANGE]) { in bma4xx_emul_backend_get_sample_range()
275 *shift = 5; in bma4xx_emul_backend_get_sample_range()
276 *upper = (q31_t)(2 * 9.80665 * BIT(31 - 5)); in bma4xx_emul_backend_get_sample_range()
277 *lower = -*upper; in bma4xx_emul_backend_get_sample_range()
278 /* (1 << (31 - shift) >> 12) * 2 (where 2 comes from 2g range) */ in bma4xx_emul_backend_get_sample_range()
279 *epsilon = BIT(31 - 5 - 12 + 1); in bma4xx_emul_backend_get_sample_range()
282 *shift = 6; in bma4xx_emul_backend_get_sample_range()
283 *upper = (q31_t)(4 * 9.80665 * BIT(31 - 6)); in bma4xx_emul_backend_get_sample_range()
284 *lower = -*upper; in bma4xx_emul_backend_get_sample_range()
285 /* (1 << (31 - shift) >> 12) * 4 (where 4 comes from 4g range) */ in bma4xx_emul_backend_get_sample_range()
286 *epsilon = BIT(31 - 6 - 12 + 2); in bma4xx_emul_backend_get_sample_range()
289 *shift = 7; in bma4xx_emul_backend_get_sample_range()
290 *upper = (q31_t)(8 * 9.80665 * BIT(31 - 7)); in bma4xx_emul_backend_get_sample_range()
291 *lower = -*upper; in bma4xx_emul_backend_get_sample_range()
292 /* (1 << (31 - shift) >> 12) * 8 (where 8 comes from 8g range) */ in bma4xx_emul_backend_get_sample_range()
293 *epsilon = BIT(31 - 7 - 12 + 3); in bma4xx_emul_backend_get_sample_range()
296 *shift = 8; in bma4xx_emul_backend_get_sample_range()
297 *upper = (q31_t)(16 * 9.80665 * BIT(31 - 8)); in bma4xx_emul_backend_get_sample_range()
298 *lower = -*upper; in bma4xx_emul_backend_get_sample_range()
299 /* (1 << (31 - shift) >> 12) * 16 (where 16 comes from 16g range) */ in bma4xx_emul_backend_get_sample_range()
300 *epsilon = BIT(31 - 8 - 12 + 4); in bma4xx_emul_backend_get_sample_range()
303 return -ENOTSUP; in bma4xx_emul_backend_get_sample_range()