61 static inline int adxl362_set_reg(const struct device *dev,  in adxl362_set_reg()  function
130 	return adxl362_set_reg(dev, ADXL362_RESET_KEY,  in adxl362_software_reset()
215 	ret = adxl362_set_reg(dev, new_filter_ctl, ADXL362_REG_FILTER_CTL, 1);  in adxl362_set_range()
239 	return adxl362_set_reg(dev, new_filter_ctl, ADXL362_REG_FILTER_CTL, 1);  in adxl362_set_output_rate()
314 	ret = adxl362_set_reg(dev, (threshold & 0x7FF), reg, 2);  in adxl362_attr_set_thresh()
332 		return adxl362_set_reg(dev, timeout, ADXL362_REG_TIME_INACT_L, 2);  in adxl362_attr_set()
378 	ret = adxl362_set_reg(dev, write_val, ADXL362_REG_FIFO_CTL, 1);  in adxl362_fifo_setup()
383 	ret = adxl362_set_reg(dev, water_mark_lvl, ADXL362_REG_FIFO_SAMPLES, 1);  in adxl362_fifo_setup()
417 	ret = adxl362_set_reg(dev, (threshold & 0x7FF),  in adxl362_setup_activity_detection()
423 	ret = adxl362_set_reg(dev, time, ADXL362_REG_TIME_ACT, 1);  in adxl362_setup_activity_detection()
440 	ret = adxl362_set_reg(dev, new_act_inact_reg,  in adxl362_setup_activity_detection()
459 	ret = adxl362_set_reg(dev, (threshold & 0x7FF),  in adxl362_setup_inactivity_detection()
465 	ret = adxl362_set_reg(dev, time, ADXL362_REG_TIME_INACT_L, 2);  in adxl362_setup_inactivity_detection()
483 	ret = adxl362_set_reg(dev, new_act_inact_reg,  in adxl362_setup_inactivity_detection()
519 	ret = adxl362_set_reg(dev, new_act_inact_reg,  in adxl362_set_interrupt_mode()
752 	ret = adxl362_set_reg(dev, config->power_ctl, ADXL362_REG_POWER_CTL, 1);  in adxl362_chip_init()