54 	const sdmmc_dev_t *sdio_hw;  member
121 static int sdmmc_host_set_clk_div(sdmmc_dev_t *sdio_hw, int div)  in sdmmc_host_set_clk_div()  argument
128 	sdmmc_ll_set_clock_div(sdio_hw, div);  in sdmmc_host_set_clk_div()
129 	sdmmc_ll_select_clk_source(sdio_hw, SDMMC_CLK_SRC_DEFAULT);  in sdmmc_host_set_clk_div()
130 	sdmmc_ll_init_phase_delay(sdio_hw);  in sdmmc_host_set_clk_div()
138 static void sdmmc_host_dma_init(sdmmc_dev_t *sdio_hw)  in sdmmc_host_dma_init()  argument
140 	sdio_hw->ctrl.dma_enable = 1;  in sdmmc_host_dma_init()
141 	sdio_hw->bmod.val = 0;  in sdmmc_host_dma_init()
142 	sdio_hw->bmod.sw_reset = 1;  in sdmmc_host_dma_init()
143 	sdio_hw->idinten.ni = 1;  in sdmmc_host_dma_init()
144 	sdio_hw->idinten.ri = 1;  in sdmmc_host_dma_init()
145 	sdio_hw->idinten.ti = 1;  in sdmmc_host_dma_init()
148 static void sdmmc_host_dma_stop(sdmmc_dev_t *sdio_hw)  in sdmmc_host_dma_stop()  argument
150 	sdio_hw->ctrl.use_internal_dma = 0;  in sdmmc_host_dma_stop()
151 	sdio_hw->ctrl.dma_reset = 1;  in sdmmc_host_dma_stop()
152 	sdio_hw->bmod.fb = 0;  in sdmmc_host_dma_stop()
153 	sdio_hw->bmod.enable = 0;  in sdmmc_host_dma_stop()
265 static void sdmmc_host_dma_resume(sdmmc_dev_t *sdio_hw)  in sdmmc_host_dma_resume()  argument
267 	sdmmc_ll_poll_demand(sdio_hw);  in sdmmc_host_dma_resume()
270 static void sdmmc_host_dma_prepare(sdmmc_dev_t *sdio_hw, sdmmc_desc_t *desc, size_t block_size,  in sdmmc_host_dma_prepare()  argument
274 	sdmmc_ll_set_data_transfer_len(sdio_hw, data_size);  in sdmmc_host_dma_prepare()
275 	sdmmc_ll_set_block_size(sdio_hw, block_size);  in sdmmc_host_dma_prepare()
276 	sdmmc_ll_set_desc_addr(sdio_hw, (uint32_t)desc);  in sdmmc_host_dma_prepare()
279 	sdmmc_ll_enable_dma(sdio_hw, true);  in sdmmc_host_dma_prepare()
280 	sdmmc_host_dma_resume(sdio_hw);  in sdmmc_host_dma_prepare()
283 static int sdmmc_host_start_command(sdmmc_dev_t *sdio_hw, int slot, sdmmc_hw_cmd_t cmd,  in sdmmc_host_start_command()  argument
289 	if (!sdmmc_ll_is_card_detected(sdio_hw, slot)) {  in sdmmc_host_start_command()
292 	if (cmd.data_expected && cmd.rw && sdmmc_ll_is_card_write_protected(sdio_hw, slot)) {  in sdmmc_host_start_command()
302 	while (sdio_hw->cmd.start_command == 1) {  in sdmmc_host_start_command()
314 	sdio_hw->cmdarg = arg;  in sdmmc_host_start_command()
317 	sdio_hw->cmd = cmd;  in sdmmc_host_start_command()
322 static void process_command_response(sdmmc_dev_t *sdio_hw, uint32_t status,  in process_command_response()  argument
328 			memcpy(cmd->response, (uint32_t *)sdio_hw->resp, 4 * sizeof(uint32_t));  in process_command_response()
330 			cmd->response[0] = sdio_hw->resp[0];  in process_command_response()
355 			sdmmc_host_dma_stop(sdio_hw);  in process_command_response()
361 static void process_data_status(sdmmc_dev_t *sdio_hw, uint32_t status, struct sdmmc_command *cmd)  in process_data_status()  argument
373 		sdio_hw->ctrl.fifo_reset = 1;  in process_data_status()
378 			sdmmc_host_dma_stop(sdio_hw);  in process_data_status()
424 	sdmmc_dev_t *sdio_hw = (sdmmc_dev_t *)cfg->sdio_hw;  in process_events()  local
447 				process_command_response(sdio_hw, orig_evt.sdmmc_status, cmd);  in process_events()
455 				process_command_response(sdio_hw, orig_evt.sdmmc_status, cmd);  in process_events()
471 				process_data_status(sdio_hw, orig_evt.sdmmc_status, cmd);  in process_events()
472 				sdmmc_host_dma_stop(sdio_hw);  in process_events()
483 					sdmmc_host_dma_resume(sdio_hw);  in process_events()
500 			process_data_status(sdio_hw, orig_evt.sdmmc_status, cmd);  in process_events()
519 	sdmmc_dev_t *sdio_hw = (sdmmc_dev_t *)cfg->sdio_hw;  in handle_event()  local
529 			sdmmc_host_dma_stop(sdio_hw);  in handle_event()
549 static bool wait_for_busy_cleared(const sdmmc_dev_t *sdio_hw, uint32_t timeout_ms)  in wait_for_busy_cleared()  argument
552 		return !(sdio_hw->status.data_busy == 1);  in wait_for_busy_cleared()
562 		if (!(sdio_hw->status.data_busy == 1)) {  in wait_for_busy_cleared()
626 	sdmmc_dev_t *sdio_hw = (sdmmc_dev_t *)cfg->sdio_hw;  in sdmmc_host_do_transaction()  local
670 		sdmmc_host_dma_prepare(sdio_hw, &data->s_dma_desc[0], cmdinfo->blklen,  in sdmmc_host_do_transaction()
675 	ret = sdmmc_host_start_command(sdio_hw, slot, hw_cmd, cmdinfo->arg);  in sdmmc_host_do_transaction()
695 		if (!wait_for_busy_cleared(sdio_hw, cmdinfo->timeout_ms)) {  in sdmmc_host_do_transaction()
709 static int sdmmc_host_clock_update_command(sdmmc_dev_t *sdio_hw, int slot)  in sdmmc_host_clock_update_command()  argument
719 		ret = sdmmc_host_start_command(sdio_hw, slot, cmd_val, 0);  in sdmmc_host_clock_update_command()
737 			if (sdio_hw->rintsts.hle) {  in sdmmc_host_clock_update_command()
738 				sdio_hw->rintsts.hle = 1;  in sdmmc_host_clock_update_command()
744 			if (sdio_hw->cmd.start_command == 0) {  in sdmmc_host_clock_update_command()
807 int sdmmc_host_set_card_clk(sdmmc_dev_t *sdio_hw, int slot, uint32_t freq_khz)  in sdmmc_host_set_card_clk()  argument
814 	sdmmc_ll_enable_card_clock(sdio_hw, slot, false);  in sdmmc_host_set_card_clk()
815 	int err = sdmmc_host_clock_update_command(sdio_hw, slot);  in sdmmc_host_set_card_clk()
834 	sdmmc_ll_set_card_clock_div(sdio_hw, slot, card_div);  in sdmmc_host_set_card_clk()
835 	err = sdmmc_host_set_clk_div(sdio_hw, host_div);  in sdmmc_host_set_card_clk()
841 	err = sdmmc_host_clock_update_command(sdio_hw, slot);  in sdmmc_host_set_card_clk()
850 	sdmmc_ll_enable_card_clock(sdio_hw, slot, true);  in sdmmc_host_set_card_clk()
851 	sdmmc_ll_enable_card_clock_low_power(sdio_hw, slot, true);  in sdmmc_host_set_card_clk()
853 	err = sdmmc_host_clock_update_command(sdio_hw, slot);  in sdmmc_host_set_card_clk()
865 	sdmmc_ll_set_data_timeout(sdio_hw, data_timeout_cycles);  in sdmmc_host_set_card_clk()
867 	sdmmc_ll_set_response_timeout(sdio_hw, 255);  in sdmmc_host_set_card_clk()
872 int sdmmc_host_set_bus_width(sdmmc_dev_t *sdio_hw, int slot, size_t width)  in sdmmc_host_set_bus_width()  argument
881 		sdio_hw->ctype.card_width_8 &= ~mask;  in sdmmc_host_set_bus_width()
882 		sdio_hw->ctype.card_width &= ~mask;  in sdmmc_host_set_bus_width()
884 		sdio_hw->ctype.card_width_8 &= ~mask;  in sdmmc_host_set_bus_width()
885 		sdio_hw->ctype.card_width |= mask;  in sdmmc_host_set_bus_width()
925 	sdmmc_dev_t *sdio_hw = (sdmmc_dev_t *)cfg->sdio_hw;  in sdhc_esp32_reset()  local
928 	sdio_hw->ctrl.controller_reset = 1;  in sdhc_esp32_reset()
929 	sdio_hw->ctrl.dma_reset = 1;  in sdhc_esp32_reset()
930 	sdio_hw->ctrl.fifo_reset = 1;  in sdhc_esp32_reset()
937 	while (sdio_hw->ctrl.controller_reset || sdio_hw->ctrl.fifo_reset ||  in sdhc_esp32_reset()
938 	       sdio_hw->ctrl.dma_reset) {  in sdhc_esp32_reset()
961 	sdmmc_dev_t *sdio_hw = (sdmmc_dev_t *)cfg->sdio_hw;  in sdhc_esp32_set_io()  local
980 			ret = sdmmc_host_set_card_clk(sdio_hw, cfg->slot, (ios->clock / 1000));  in sdhc_esp32_set_io()
1007 			ret = sdmmc_host_set_bus_width(sdio_hw, cfg->slot, bus_width);  in sdhc_esp32_set_io()
1036 				sdmmc_ll_enable_ddr_mode(sdio_hw, cfg->slot, false);  in sdhc_esp32_set_io()
1041 				sdmmc_ll_enable_ddr_mode(sdio_hw, cfg->slot, true);  in sdhc_esp32_set_io()
1046 				sdmmc_ll_enable_ddr_mode(sdio_hw, cfg->slot, false);  in sdhc_esp32_set_io()
1072 	const sdmmc_dev_t *sdio_hw = cfg->sdio_hw;  in sdhc_esp32_card_busy()  local
1074 	return (sdio_hw->status.data_busy == 1);  in sdhc_esp32_card_busy()
1222 	sdmmc_dev_t *sdio_hw = (sdmmc_dev_t *)cfg->sdio_hw;  in sdhc_esp32_get_card_present()  local
1224 	return sdmmc_ll_is_card_detected(sdio_hw, cfg->slot);  in sdhc_esp32_get_card_present()
1258 	sdmmc_dev_t *sdio_hw = (sdmmc_dev_t *)cfg->sdio_hw;  in sdio_esp32_isr()  local
1262 	uint32_t pending = sdmmc_ll_get_intr_status(sdio_hw) & 0xFFFF;  in sdio_esp32_isr()
1264 	sdio_hw->rintsts.val = pending;  in sdio_esp32_isr()
1267 	uint32_t dma_pending = sdio_hw->idsts.val;  in sdio_esp32_isr()
1269 	sdio_hw->idsts.val = dma_pending;  in sdio_esp32_isr()
1284 	sdmmc_dev_t *sdio_hw = (sdmmc_dev_t *)cfg->sdio_hw;  in sdhc_esp32_init()  local
1328 	ret = sdmmc_host_set_clk_div(sdio_hw, 2);  in sdhc_esp32_init()
1338 	sdio_hw->rintsts.val = 0xffffffff;  in sdhc_esp32_init()
1339 	sdio_hw->intmask.val = 0;  in sdhc_esp32_init()
1340 	sdio_hw->ctrl.int_enable = 0;  in sdhc_esp32_init()
1355 	sdio_hw->intmask.val = SDMMC_INTMASK_CD | SDMMC_INTMASK_CMD_DONE | SDMMC_INTMASK_DATA_OVER |  in sdhc_esp32_init()
1361 	sdio_hw->ctrl.int_enable = 1;  in sdhc_esp32_init()
1364 	sdio_hw->cardthrctl.busy_clr_int_en = 0;  in sdhc_esp32_init()
1367 	sdmmc_host_dma_init(sdio_hw);  in sdhc_esp32_init()
1381 	ret = sdmmc_host_set_card_clk(sdio_hw, cfg->slot, data->bus_clock / 1000);  in sdhc_esp32_init()
1388 	ret = sdmmc_host_set_bus_width(sdio_hw, cfg->slot, data->bus_width);  in sdhc_esp32_init()
1413 		.sdio_hw = (const sdmmc_dev_t *)DT_REG_ADDR(DT_INST_PARENT(n)),                    \