Lines Matching +full:enable +full:- +full:high +full:- +full:speed +full:- +full:mode
3 * SPDX-License-Identifier: Apache-2.0
26 /* SRS09 - Present State Register */
30 /* SRS10 - Host Control 1 (General / Power / Block-Gap / Wake-Up) */
64 * • 1111b - Reserved
65 * • 1110b - t_sdmclk*2(27+2)
66 * • 1101b - t_sdmclk*2(26+2)
100 /* V18SE is 0 for DS and HS, 1 for UHS-I */
217 /* Auto CMD Enable */
227 /* HRS07 - IO Delay Information Register */
232 /* HRS09 - PHY Control and Status Register */
235 /* HRS10 - Host Controller SDCLK start point adjustment */
238 /* HCSDCLKADJ DATA; DDR Mode */
257 #define MMC_BLOCK_MASK (MMC_BLOCK_SIZE - 1)
440 /* Default speed */
442 /* High speed */
444 /* Ultra high speed SDR12 */
446 /* Ultra high speed SDR25 */
448 /* Ultra high speed SDR`50 */
450 /* Ultra high speed SDR104 */
452 /* Ultra high speed DDR50 */
460 /* High speed 200Mhz in SDR */
462 /* High speed 200Mhz in DDR */
464 /* High speed 200Mhz in SDR with enhanced strobe */