Lines Matching +full:3 +full:x

12 #define CDNS_HRS09_EXT_WR_MODE		BIT(3)
15 #define CDNS_HRS09_EXT_RD_MODE(x) ((x) << 2) argument
16 #define CDNS_HRS09_EXTENDED_WR(x) ((x) << 3) argument
17 #define CDNS_HRS09_RDCMD_EN(x) ((x) << 15) argument
18 #define CDNS_HRS09_RDDATA_EN(x) ((x) << 16) argument
82 #define BUFFER_BOUNDARY_32K 3U
98 #define CDNS_SRS15_SDR104 (3 << CDNS_SRS15_UMS)
122 #define CP_USE_EXT_LPBK_DQS(x) (x << 22) argument
123 #define CP_USE_LPBK_DQS(x) (x << 21) argument
124 #define CP_USE_PHONY_DQS(x) (x << 20) argument
125 #define CP_USE_PHONY_DQS_CMD(x) (x << 19) argument
128 #define CP_SYNC_METHOD(x) ((x) << 31) argument
129 #define CP_SW_HALF_CYCLE_SHIFT(x) ((x) << 28) argument
130 #define CP_RD_DEL_SEL(x) ((x) << 19) argument
131 #define CP_UNDERRUN_SUPPRESS(x) ((x) << 18) argument
132 #define CP_GATE_CFG_ALWAYS_ON(x) ((x) << 6) argument
135 #define CP_DLL_BYPASS_MODE(x) ((x) << 23) argument
136 #define CP_DLL_START_POINT(x) ((x) << 0) argument
139 #define CP_READ_DQS_CMD_DELAY(x) ((x) << 24) argument
140 #define CP_CLK_WRDQS_DELAY(x) ((x) << 16) argument
141 #define CP_CLK_WR_DELAY(x) ((x) << 8) argument
142 #define CP_READ_DQS_DELAY(x) (x) argument
145 #define CP_IO_MASK_ALWAYS_ON(x) ((x) << 31) argument
146 #define CP_IO_MASK_END(x) ((x) << 27) argument
147 #define CP_IO_MASK_START(x) ((x) << 24) argument
148 #define CP_DATA_SELECT_OE_END(x) (x) argument
199 #define CMD_STOP_ABORT_CMD (3 << CDNS_SRS03_CMD_TYPE)
215 #define RES_TYPE_SEL_48_B (3 << CDNS_SRS03_RES_TYPE_SEL)
222 #define AUTO_CMD_AUTO (3 << CDNS_SRS03_ACE)
229 #define CDNS_HRS07_IDELAY_VAL(x) (x) argument
230 #define CDNS_HRS07_RW_COMPENSATE(x) ((x) << 16) argument
239 #define SDHC_HRS10_HCSDCLKADJ(x) ((x) << 16) argument
242 #define CDNS_HRS16_WRCMD0_DLY(x) (x) argument
243 #define CDNS_HRS16_WRCMD1_DLY(x) ((x) << 4) argument
244 #define CDNS_HRS16_WRDATA0_DLY(x) ((x) << 8) argument
245 #define CDNS_HRS16_WRDATA1_DLY(x) ((x) << 12) argument
246 #define CDNS_HRS16_WRCMD0_SDCLK_DLY(x) ((x) << 16) argument
247 #define CDNS_HRS16_WRCMD1_SDCLK_DLY(x) ((x) << 20) argument
248 #define CDNS_HRS16_WRDATA0_SDCLK_DLY(x) ((x) << 24) argument
249 #define CDNS_HRS16_WRDATA1_SDCLK_DLY(x) ((x) << 28) argument
279 #define MMC_RSP_CMD_IDX BIT(3) /* response contains cmd idx */
302 #define PART_CFG_BOOT_PARTITION1_ENABLE BIT(3)
312 #define MMC_BOOT_MODE_HS_TIMING BIT(3)
313 #define MMC_BOOT_MODE_DDR (2 << 3)
318 #define EXTCSD_WRITE_BYTES (3 << 24)
319 #define EXTCSD_CMD(x) (((x) & 0xff) << 16) argument
320 #define EXTCSD_VALUE(x) (((x) & 0xff) << 8) argument
324 #define CSD_TRAN_SPEED_MULT_MASK GENMASK(6, 3)
325 #define CSD_TRAN_SPEED_MULT_SHIFT 3
327 #define STATUS_CURRENT_STATE(x) (((x) & 0xf) << 9) argument
330 #define MMC_GET_STATE(x) (((x) >> 9) & 0xf) argument
334 #define MMC_STATE_STBY 3
361 #define ADMA2_32 (2 << 3)
362 #define ADMA2_64 (3 << 3)