Lines Matching full:timer
79 /** Timer clock (Hz). */
90 TIM_TypeDef *timer; member
101 /** Maximum number of timer channels : some stm32 soc have 6 else only 4 */
131 /** Maximum number of complemented timer channels is ARRAY_SIZE(ch2ll_n)*/
213 * Obtain timer clock speed.
215 * @param pclken Timer clock control subsystem.
216 * @param tim_clk Where computed timer clock will be stored.
267 * Up to a certain threshold value of APB{1,2} prescaler, timer clock in get_tim_clk()
269 * (2 if TIMPRE=0, 4 if TIMPRE=1). Above threshold, timer clock is set in get_tim_clk()
297 * If the APB prescaler equals 1, the timer clock frequencies in get_tim_clk()
331 if (!IS_TIM_32B_COUNTER_INSTANCE(cfg->timer) && in pwm_stm32_set_cycles()
333 LOG_ERR("Cannot set PWM output, value exceeds 16-bit timer limit."); in pwm_stm32_set_cycles()
338 if (LL_TIM_IsEnabledIT_CC1(cfg->timer) || LL_TIM_IsEnabledIT_CC2(cfg->timer) || in pwm_stm32_set_cycles()
339 LL_TIM_IsEnabledIT_CC3(cfg->timer) || LL_TIM_IsEnabledIT_CC4(cfg->timer)) { in pwm_stm32_set_cycles()
368 LL_TIM_CC_DisableChannel(cfg->timer, current_ll_channel); in pwm_stm32_set_cycles()
387 if (!LL_TIM_CC_IsEnabledChannel(cfg->timer, current_ll_channel)) { in pwm_stm32_set_cycles()
401 oc_init.OCState = LL_TIM_CC_IsEnabledChannel(cfg->timer, ll_channel) in pwm_stm32_set_cycles()
404 oc_init.OCPolarity = LL_TIM_OC_GetPolarity(cfg->timer, ll_channel); in pwm_stm32_set_cycles()
412 LL_TIM_CC_IsEnabledChannel(cfg->timer, negative_ll_channel) in pwm_stm32_set_cycles()
416 LL_TIM_OC_GetPolarity(cfg->timer, negative_ll_channel); in pwm_stm32_set_cycles()
427 if (IS_TIM_SLAVE_INSTANCE(cfg->timer)) { in pwm_stm32_set_cycles()
428 LL_TIM_SetSlaveMode(cfg->timer, in pwm_stm32_set_cycles()
430 LL_TIM_SetTriggerInput(cfg->timer, LL_TIM_TS_ITR0); in pwm_stm32_set_cycles()
431 LL_TIM_DisableMasterSlaveMode(cfg->timer); in pwm_stm32_set_cycles()
436 if (LL_TIM_OC_Init(cfg->timer, ll_channel, &oc_init) != SUCCESS) { in pwm_stm32_set_cycles()
437 LOG_ERR("Could not initialize timer channel output"); in pwm_stm32_set_cycles()
441 LL_TIM_EnableARRPreload(cfg->timer); in pwm_stm32_set_cycles()
443 LL_TIM_OC_EnablePreload(cfg->timer, ll_channel); in pwm_stm32_set_cycles()
444 LL_TIM_SetAutoReload(cfg->timer, period_cycles); in pwm_stm32_set_cycles()
445 LL_TIM_GenerateEvent_UPDATE(cfg->timer); in pwm_stm32_set_cycles()
448 LL_TIM_OC_SetPolarity(cfg->timer, current_ll_channel, get_polarity(flags)); in pwm_stm32_set_cycles()
449 set_timer_compare[channel - 1u](cfg->timer, pulse_cycles); in pwm_stm32_set_cycles()
450 LL_TIM_SetAutoReload(cfg->timer, period_cycles); in pwm_stm32_set_cycles()
472 if (LL_TIM_IC_Init(cfg->timer, ch2ll[channel - 1], &ic) != SUCCESS) { in init_capture_channels()
481 if (LL_TIM_IC_Init(cfg->timer, ch2ll[complimentary_channel[channel] - 1], &ic) != SUCCESS) { in init_capture_channels()
524 if (LL_TIM_IsEnabledIT_CC1(cfg->timer) || LL_TIM_IsEnabledIT_CC2(cfg->timer) || in pwm_stm32_configure_capture()
525 LL_TIM_IsEnabledIT_CC3(cfg->timer) || LL_TIM_IsEnabledIT_CC4(cfg->timer)) { in pwm_stm32_configure_capture()
535 if (!cfg->four_channel_capture_support && !IS_TIM_SLAVE_INSTANCE(cfg->timer)) { in pwm_stm32_configure_capture()
537 LOG_ERR("Timer does not support slave mode for PWM capture"); in pwm_stm32_configure_capture()
548 LL_TIM_SetSlaveMode(cfg->timer, LL_TIM_SLAVEMODE_DISABLED); in pwm_stm32_configure_capture()
557 LL_TIM_SetTriggerInput(cfg->timer, LL_TIM_TS_TI1FP1); in pwm_stm32_configure_capture()
559 LL_TIM_SetTriggerInput(cfg->timer, LL_TIM_TS_TI2FP2); in pwm_stm32_configure_capture()
561 LL_TIM_SetSlaveMode(cfg->timer, LL_TIM_SLAVEMODE_RESET); in pwm_stm32_configure_capture()
564 LL_TIM_EnableARRPreload(cfg->timer); in pwm_stm32_configure_capture()
565 if (!IS_TIM_32B_COUNTER_INSTANCE(cfg->timer)) { in pwm_stm32_configure_capture()
566 LL_TIM_SetAutoReload(cfg->timer, 0xffffu); in pwm_stm32_configure_capture()
568 LL_TIM_SetAutoReload(cfg->timer, 0xffffffffu); in pwm_stm32_configure_capture()
570 LL_TIM_EnableUpdateEvent(cfg->timer); in pwm_stm32_configure_capture()
593 if (LL_TIM_IsEnabledIT_CC1(cfg->timer) || LL_TIM_IsEnabledIT_CC2(cfg->timer) || in pwm_stm32_enable_capture()
594 LL_TIM_IsEnabledIT_CC3(cfg->timer) || LL_TIM_IsEnabledIT_CC4(cfg->timer)) { in pwm_stm32_enable_capture()
609 clear_capture_interrupt[channel - 1](cfg->timer); in pwm_stm32_enable_capture()
610 LL_TIM_ClearFlag_UPDATE(cfg->timer); in pwm_stm32_enable_capture()
612 LL_TIM_SetUpdateSource(cfg->timer, LL_TIM_UPDATESOURCE_COUNTER); in pwm_stm32_enable_capture()
614 enable_capture_interrupt[channel - 1](cfg->timer); in pwm_stm32_enable_capture()
616 LL_TIM_CC_EnableChannel(cfg->timer, ch2ll[channel - 1]); in pwm_stm32_enable_capture()
617 LL_TIM_CC_EnableChannel(cfg->timer, ch2ll[complimentary_channel[channel] - 1]); in pwm_stm32_enable_capture()
618 LL_TIM_EnableIT_UPDATE(cfg->timer); in pwm_stm32_enable_capture()
619 LL_TIM_GenerateEvent_UPDATE(cfg->timer); in pwm_stm32_enable_capture()
640 LL_TIM_SetUpdateSource(cfg->timer, LL_TIM_UPDATESOURCE_REGULAR); in pwm_stm32_disable_capture()
642 disable_capture_interrupt[channel - 1](cfg->timer); in pwm_stm32_disable_capture()
644 LL_TIM_DisableIT_UPDATE(cfg->timer); in pwm_stm32_disable_capture()
645 LL_TIM_CC_DisableChannel(cfg->timer, ch2ll[channel - 1]); in pwm_stm32_disable_capture()
646 LL_TIM_CC_DisableChannel(cfg->timer, ch2ll[complimentary_channel[channel] - 1]); in pwm_stm32_disable_capture()
659 if (LL_TIM_IsActiveFlag_UPDATE(cfg->timer)) { in pwm_stm32_isr()
660 LL_TIM_ClearFlag_UPDATE(cfg->timer); in pwm_stm32_isr()
663 if (LL_TIM_IsActiveFlag_CC1(cfg->timer) in pwm_stm32_isr()
664 || LL_TIM_IsActiveFlag_CC2(cfg->timer) in pwm_stm32_isr()
665 || LL_TIM_IsActiveFlag_CC3(cfg->timer) in pwm_stm32_isr()
666 || LL_TIM_IsActiveFlag_CC4(cfg->timer)) { in pwm_stm32_isr()
667 LL_TIM_ClearFlag_CC1(cfg->timer); in pwm_stm32_isr()
668 LL_TIM_ClearFlag_CC2(cfg->timer); in pwm_stm32_isr()
669 LL_TIM_ClearFlag_CC3(cfg->timer); in pwm_stm32_isr()
670 LL_TIM_ClearFlag_CC4(cfg->timer); in pwm_stm32_isr()
677 if (LL_TIM_IsActiveFlag_UPDATE(cfg->timer)) { in pwm_stm32_isr()
678 LL_TIM_ClearFlag_UPDATE(cfg->timer); in pwm_stm32_isr()
689 if (is_capture_active[cpt->channel - 1](cfg->timer) || in pwm_stm32_isr()
690 is_capture_active[complimentary_channel[cpt->channel] - 1](cfg->timer)) { in pwm_stm32_isr()
691 clear_capture_interrupt[cpt->channel - 1](cfg->timer); in pwm_stm32_isr()
693 [complimentary_channel[cpt->channel] - 1](cfg->timer); in pwm_stm32_isr()
695 cpt->period = get_channel_capture[cpt->channel - 1](cfg->timer); in pwm_stm32_isr()
697 [complimentary_channel[cpt->channel] - 1](cfg->timer); in pwm_stm32_isr()
701 is_capture_active[cpt->channel - 1](cfg->timer)) { in pwm_stm32_isr()
712 LL_TIM_GenerateEvent_UPDATE(cfg->timer); in pwm_stm32_isr()
716 is_capture_active[cpt->channel - 1](cfg->timer)) { in pwm_stm32_isr()
719 * the timer value when the pulse and period ended respectively. in pwm_stm32_isr()
722 (cfg->timer); in pwm_stm32_isr()
723 cpt->period = get_channel_capture[cpt->channel - 1](cfg->timer); in pwm_stm32_isr()
726 clear_capture_interrupt[cpt->channel - 1](cfg->timer); in pwm_stm32_isr()
799 LOG_ERR("Could not obtain timer clock (%d)", r); in pwm_stm32_init()
803 /* Reset timer to default state using RCC */ in pwm_stm32_init()
813 /* initialize timer */ in pwm_stm32_init()
821 if (LL_TIM_Init(cfg->timer, &init) != SUCCESS) { in pwm_stm32_init()
822 LOG_ERR("Could not initialize timer"); in pwm_stm32_init()
828 if (IS_TIM_BREAK_INSTANCE(cfg->timer)) { in pwm_stm32_init()
829 LL_TIM_EnableAllOutputs(cfg->timer); in pwm_stm32_init()
833 LL_TIM_EnableCounter(cfg->timer); in pwm_stm32_init()
894 .timer = (TIM_TypeDef *)DT_REG_ADDR(PWM(index)), \
897 .pclken = DT_INST_CLK(index, timer), \