Lines Matching +full:half +full:- +full:cycle
4 * SPDX-License-Identifier: Apache-2.0
48 #define RCAR_PWM_CNT_CYC_MASK 0x03ff0000 /* PWM Cycle */
50 #define RCAR_PWM_CNT_PH_MASK 0x000003ff /* PWM High-Level Period */
67 return sys_read32(config->reg_addr + offs); in pwm_rcar_read()
72 sys_write32(value, config->reg_addr + offs); in pwm_rcar_write()
109 return -ENOTSUP; in pwm_rcar_update_clk()
116 return -ENOTSUP; in pwm_rcar_update_clk()
121 power--; in pwm_rcar_update_clk()
138 const struct pwm_rcar_cfg *config = dev->config; in pwm_rcar_set_cycles()
143 return -ENOTSUP; in pwm_rcar_set_cycles()
147 return -ENOTSUP; in pwm_rcar_set_cycles()
152 return -EINVAL; in pwm_rcar_set_cycles()
157 config->reg_addr, pulse_cycles, period_cycles, in pwm_rcar_set_cycles()
171 * if period_cycles is less than half of the counter, then the in pwm_rcar_set_cycles()
182 /* Set total period cycle */ in pwm_rcar_set_cycles()
188 /* Set high level period cycle */ in pwm_rcar_set_cycles()
202 const struct pwm_rcar_cfg *config = dev->config; in pwm_rcar_get_cycles_per_sec()
203 struct pwm_rcar_data *data = dev->data; in pwm_rcar_get_cycles_per_sec()
207 return -ENOTSUP; in pwm_rcar_get_cycles_per_sec()
212 *cycles = data->clk_rate >> diviser; in pwm_rcar_get_cycles_per_sec()
221 const struct pwm_rcar_cfg *config = dev->config; in pwm_rcar_init()
222 struct pwm_rcar_data *data = dev->data; in pwm_rcar_init()
226 ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); in pwm_rcar_init()
231 ret = clock_control_on(config->clock_dev, (clock_control_subsys_t)&config->mod_clk); in pwm_rcar_init()
236 ret = clock_control_get_rate(config->clock_dev, (clock_control_subsys_t)&config->core_clk, in pwm_rcar_init()
237 &data->clk_rate); in pwm_rcar_init()