29 static void configure_pin_props(uint32_t pin_mux, uint8_t gpio_idx)  in configure_pin_props()  argument
38 	if (gpio_idx > 21 && gpio_idx < 28) {  in configure_pin_props()
47 	pull_reg += (gpio_idx >> 4);  in configure_pin_props()
48 	slew_reg += (gpio_idx >> 4);  in configure_pin_props()
49 	sleep_force_en += (gpio_idx >> 5);  in configure_pin_props()
50 	sleep_force_val += (gpio_idx >> 5);  in configure_pin_props()
55 	mask = 0x3 << ((gpio_idx & 0xF) << 1);  in configure_pin_props()
56 	set = IOMUX_PAD_GET_PULL(pin_mux) << ((gpio_idx & 0xF) << 1);  in configure_pin_props()
60 	set = IOMUX_PAD_GET_SLEW(pin_mux) << ((gpio_idx & 0xF) << 1);  in configure_pin_props()
64 	mask = (0x1 << (gpio_idx & 0x1F));  in configure_pin_props()
65 	set = (IOMUX_PAD_GET_SLEEP_FORCE_EN(pin_mux) << (gpio_idx & 0x1F));  in configure_pin_props()
67 	set = (IOMUX_PAD_GET_SLEEP_FORCE_VAL(pin_mux) << (gpio_idx & 0x1F));  in configure_pin_props()
71 static void select_gpio_mode(uint8_t gpio_idx)  in select_gpio_mode()  argument
73 	uint64_t gpio_setting = gpio_muxes[gpio_idx];  in select_gpio_mode()
98 	mci_iomux->S_GPIO &= ~(0x1 << (gpio_idx - 32));  in select_gpio_mode()
112 		uint8_t gpio_idx = IOMUX_GET_GPIO_IDX(pin_mux);  in pinctrl_configure_pins()  local
120 		select_gpio_mode(gpio_idx);  in pinctrl_configure_pins()
148 			mci_iomux->S_GPIO |= (0x1 << (gpio_idx - 32));  in pinctrl_configure_pins()
151 			if (gpio_idx > 32) {  in pinctrl_configure_pins()
152 				mci_iomux->GPIO_GRP1 |= (0x1 << (gpio_idx - 32));  in pinctrl_configure_pins()
154 				mci_iomux->GPIO_GRP0 |= (0x1 << gpio_idx);  in pinctrl_configure_pins()
164 		configure_pin_props(pin_mux, gpio_idx);  in pinctrl_configure_pins()
166 		if (gpio_idx > 21 && gpio_idx < 28) {  in pinctrl_configure_pins()
170 		iomux_en_reg += (gpio_idx >> 5);  in pinctrl_configure_pins()
171 		*iomux_en_reg |= (0x1 << (gpio_idx & 0x1F));  in pinctrl_configure_pins()