Lines Matching +full:alternate +full:- +full:port +full:- +full:control

2  * Copyright (c) 2016 Open-RnD Sp. z o.o.
7  * SPDX-License-Identifier: Apache-2.0
16  * Microchip XEC: each GPIO pin has two 32-bit control register.
17  * The first 32-bit register contains all pin features except
18  * slew rate and driver strength in the second control register.
20  * control address space which is the same range of the PINCTRL
41 		val |= ((drvstr - 1u) << MCHP_GPIO_CTRL2_DRV_STR_POS);  in config_drive_slew()
48 	regs->CTRL2[idx] = (regs->CTRL2[idx] & ~msk) | (val & msk);  in config_drive_slew()
53  * None, weak pull-up, weak pull-down, or repeater mode (both pulls enabled).
55  * If the no-bias boolean is set then disable internal pulls.
82  * We initially clear alternate output disable allowing us to set output state
83  * in the control register. Hardware sets output state bit in both control and
84  * parallel output register bits. Alternate output disable only controls which
87  * alternate function is input or bi-directional.
94 	uint32_t port = MCHP_XEC_PINMUX_PORT(portpin);  in xec_config_pin()  local
98 	if (port >= NUM_MCHP_GPIO_PORTS) {  in xec_config_pin()
99 		return -EINVAL;  in xec_config_pin()
102 	/* MCHP XEC family is 32 pins per port */  in xec_config_pin()
103 	idx = (port * 32U) + pin;  in xec_config_pin()
107 	/* Clear alternate output disable and input pad disable */  in xec_config_pin()
108 	regs->CTRL[idx] &= ~(BIT(MCHP_GPIO_CTRL_AOD_POS) | BIT(MCHP_GPIO_CTRL_INPAD_DIS_POS));  in xec_config_pin()
109 	pcr1 = regs->CTRL[idx]; /* current configuration including pin input state */  in xec_config_pin()
110 	pcr1 = regs->CTRL[idx]; /* read multiple times to allow propagation from pad */  in xec_config_pin()
111 	pcr1 = regs->CTRL[idx]; /* Is this necessary? */  in xec_config_pin()
147 	/* Always touch MUX (alternate function) */  in xec_config_pin()
151 	/* Always touch invert of alternate function. Need another bit to avoid touching */  in xec_config_pin()
158 	/* output state set in control & parallel regs */  in xec_config_pin()
159 	regs->CTRL[idx] = pcr1;  in xec_config_pin()
160 	/* make output state in control read-only in control and read-write in parallel reg */  in xec_config_pin()
161 	regs->CTRL[idx] = pcr1 | BIT(MCHP_GPIO_CTRL_AOD_POS);  in xec_config_pin()
179 			return -EINVAL;  in pinctrl_configure_pins()