4  * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/dt-bindings/pinctrl/quicklogic-eos-s3-pinctrl.h>
34 static int pinctrl_eos_s3_input_selection(uint32_t pin, uint32_t sel_reg)  in pinctrl_eos_s3_input_selection()  argument
39 		return -EINVAL;  in pinctrl_eos_s3_input_selection()
42 	*reg = pin;  in pinctrl_eos_s3_input_selection()
50 static int pinctrl_eos_s3_set(uint32_t pin, uint32_t func)  in pinctrl_eos_s3_set()  argument
54 	if (pin > IO_MUX_REG_MAX_OFFSET) {  in pinctrl_eos_s3_set()
55 		return -EINVAL;  in pinctrl_eos_s3_set()
57 	reg += pin;  in pinctrl_eos_s3_set()
63 static int pinctrl_eos_s3_configure_pin(const pinctrl_soc_pin_t *pin)  in pinctrl_eos_s3_configure_pin()  argument
68 	reg_value |= (pin->iof & PAD_FUNC_SEL_MASK);  in pinctrl_eos_s3_configure_pin()
71 	WRITE_BIT(reg_value, PAD_OUTPUT_EN_BIT, pin->output_enable ? 0 : 1);  in pinctrl_eos_s3_configure_pin()
74 	WRITE_BIT(reg_value, PAD_INPUT_EN_BIT, pin->input_enable);  in pinctrl_eos_s3_configure_pin()
75 	WRITE_BIT(reg_value, PAD_SLEW_RATE_BIT, pin->slew_rate);  in pinctrl_eos_s3_configure_pin()
76 	WRITE_BIT(reg_value, PAD_SCHMITT_EN_BIT, pin->schmitt_enable);  in pinctrl_eos_s3_configure_pin()
77 	WRITE_BIT(reg_value, PAD_CTRL_SEL_BIT0, pin->control_selection & BIT(0));  in pinctrl_eos_s3_configure_pin()
78 	WRITE_BIT(reg_value, PAD_CTRL_SEL_BIT1, pin->control_selection & BIT(1));  in pinctrl_eos_s3_configure_pin()
80 	switch (pin->drive_strength) {  in pinctrl_eos_s3_configure_pin()
98 		LOG_ERR("Selected drive-strength is not supported: %d\n", pin->drive_strength);  in pinctrl_eos_s3_configure_pin()
101 	/* Enable pull-up by default; overwrite if any setting was chosen. */  in pinctrl_eos_s3_configure_pin()
104 	if (pin->high_impedance) {  in pinctrl_eos_s3_configure_pin()
106 	} else if (pin->pull_up | pin->pull_down) {  in pinctrl_eos_s3_configure_pin()
107 		WRITE_BIT(reg_value, PAD_PULL_UP_BIT, pin->pull_up);  in pinctrl_eos_s3_configure_pin()
108 		WRITE_BIT(reg_value, PAD_PULL_DOWN_BIT, pin->pull_down);  in pinctrl_eos_s3_configure_pin()
112 	pinctrl_eos_s3_set(pin->pin, reg_value);  in pinctrl_eos_s3_configure_pin()
113 	if (pin->input_enable && FUNCTION_REGISTER(pin->iof)) {  in pinctrl_eos_s3_configure_pin()
114 		pinctrl_eos_s3_input_selection(pin->pin, FUNCTION_REGISTER(pin->iof));  in pinctrl_eos_s3_configure_pin()
119 int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintptr_t reg)  in pinctrl_configure_pins()
123 	for (int i = 0; i < pin_cnt; i++) {  in pinctrl_configure_pins()