Lines Matching refs:MUX_SEL4_OFFSET
27 #define MUX_SEL4_OFFSET (16) macro
36 #define MUX_SEL4_MASK (0xf << MUX_SEL4_OFFSET)
70 #define PM_C_CFG0_GPIO ((0) << MUX_SEL4_OFFSET)
71 #define PM_C_CFG0_I2C ((1) << MUX_SEL4_OFFSET) /* io_i2c_mst2 */
72 #define PM_C_CFG0_SPI ((2) << MUX_SEL4_OFFSET) /* io_spi_mst1, cs_2 */
73 #define PM_C_CFG0_UART3a ((3) << MUX_SEL4_OFFSET) /* io_uart3 */
74 #define PM_C_CFG0_UART3b ((4) << MUX_SEL4_OFFSET) /* io_uart3 */
75 #define PM_C_CFG0_PWM1 ((5) << MUX_SEL4_OFFSET)
76 #define PM_C_CFG0_PWM2 ((6) << MUX_SEL4_OFFSET)
95 #define ARDUINO_CFG4_GPIO ((0) << MUX_SEL4_OFFSET)
96 #define ARDUINO_CFG4_PWM ((1) << MUX_SEL4_OFFSET)