Lines Matching refs:MUX_SEL0_OFFSET
23 #define MUX_SEL0_OFFSET (0) macro
32 #define MUX_SEL0_MASK (0xf << MUX_SEL0_OFFSET)
44 #define PM_A_CFG0_GPIO ((0) << MUX_SEL0_OFFSET)
45 #define PM_A_CFG0_I2C ((1) << MUX_SEL0_OFFSET) /* io_i2c_mst2 */
46 #define PM_A_CFG0_SPI ((2) << MUX_SEL0_OFFSET) /* io_spi_mst1, cs_0 */
47 #define PM_A_CFG0_UART1a ((3) << MUX_SEL0_OFFSET) /* io_uart1 */
48 #define PM_A_CFG0_UART1b ((4) << MUX_SEL0_OFFSET) /* io_uart1 */
49 #define PM_A_CFG0_PWM1 ((5) << MUX_SEL0_OFFSET)
50 #define PM_A_CFG0_PWM2 ((6) << MUX_SEL0_OFFSET)
83 #define ARDUINO_CFG0_GPIO ((0) << MUX_SEL0_OFFSET)
84 #define ARDUINO_CFG0_UART ((1) << MUX_SEL0_OFFSET) /* io_uart0 */