Lines Matching refs:uint32_t
11 uint32_t lower;
12 uint32_t upper;
17 uint32_t lower;
18 uint32_t upper;
19 uint32_t axim_write_config;
20 uint32_t axim_read_config;
24 uint32_t paxb_clk_control;
25 uint32_t paxb_ep_perst_hold_off;
26 uint32_t paxb_global_control;
27 uint32_t paxb_flush_control;
28 uint32_t paxb_flush_status;
29 uint32_t paxb_strap_status;
30 uint32_t paxb_reset_status;
31 uint32_t paxb_mps_mrrs_stat;
32 uint32_t paxb_cfg_addr;
33 uint32_t paxb_cfg_data;
34 uint32_t paxb_cfg_be;
35 uint32_t paxb_config_ind_addr;
36 uint32_t paxb_config_ind_data;
37 uint32_t paxb_config_ind_cmpl_stat;
38 uint32_t paxb_config_ind_be;
39 uint32_t paxb_config_ecm_addr;
40 uint32_t paxb_config_ecm_data;
41 uint32_t paxb_hide_func_cfg;
42 uint32_t paxb_0_apb_timeout;
43 uint32_t paxb_0_apb_err_en_for_cfg_rd_cmpl;
44 uint32_t paxb_0_apb_err_en_for_cfg_wr_cmpl;
45 uint32_t paxb_0_ur_resp_on_apb_timeout;
46 uint32_t paxb_0_crs_resp_on_flr_in_progress;
47 uint32_t paxb_0_apb_read_data_on_ca;
48 uint32_t paxb_0_apb_read_data_on_crs;
49 uint32_t paxb_0_compare_bus_num_for_pf;
50 uint32_t paxb_0_latch_bus_number_on_cfg_wr;
51 uint32_t paxb_0_issue_slave_error_from_ple_on_ur;
52 uint32_t paxb_0_ep_ple_cfg_register_0;
53 uint32_t paxb_0_ep_ple_cfg_register_1;
54 uint32_t paxb_0_ep_ple_cfg_register_2;
55 uint32_t paxb_0_ep_ple_cfg_register_3;
56 uint32_t paxb_0_ep_ple_cfg_register_4;
57 uint32_t paxb_ordering_cfg;
58 uint32_t paxb_master_cfg;
59 uint32_t paxb_master_axid_seq_num_cfg;
60 uint32_t paxb_pnpn_so_traffic_shaper_count_slow;
61 uint32_t paxb_pnpn_so_traffic_shaper_count_fast;
62 uint32_t paxb_pnpn_so_traffic_shaper_thrshold;
63 uint32_t paxb_bdf_to_func_num_mapping;
64 uint32_t paxb_atomics_cfg;
65 uint32_t paxb_master_gic_its_address;
66 uint32_t paxb_master_id_seq_num_avbl_status;
67 uint32_t paxb_axim_rd_fsm_state;
68 uint32_t paxb_atomics_status;
69 uint32_t paxb_atomics_fail_addr_h_status;
70 uint32_t paxb_atomics_fail_addr_l_status;
71 uint32_t paxb_atomics_fail_status;
72 uint32_t paxb_atomics_fail_pf_vf_num;
73 uint32_t paxb_nullified_tx_pd_status;
74 uint32_t paxb_nullified_tx_pd_addr_h_status;
75 uint32_t paxb_nullified_tx_pd_addr_l_status;
76 uint32_t paxb_ds_non_posted_crdt_default;
77 uint32_t paxb_ds_posted_crdt_default;
78 uint32_t paxb_ds_cmpl_crdt_default;
79 uint32_t paxb_ds_cfg;
80 uint32_t paxb_us_cfg;
81 uint32_t paxb_axim_write_config_func0;
82 uint32_t paxb_axim_read_config_func0;
83 uint32_t paxb_axim_write_config_func1;
84 uint32_t paxb_axim_read_config_func1;
85 uint32_t paxb_axim_write_config_func2;
86 uint32_t paxb_axim_read_config_func2;
87 uint32_t paxb_axim_write_config_func3;
88 uint32_t paxb_axim_read_config_func3;
89 uint32_t paxb_axim_write_config_func4;
90 uint32_t paxb_axim_read_config_func4;
91 uint32_t paxb_axim_write_config_func5;
92 uint32_t paxb_axim_read_config_func5;
93 uint32_t paxb_axim_write_config_func6;
94 uint32_t paxb_axim_read_config_func6;
95 uint32_t paxb_axim_write_config_func7;
96 uint32_t paxb_axim_read_config_func7;
97 uint32_t paxb_axim_write_config_func8;
98 uint32_t paxb_axim_read_config_func8;
99 uint32_t paxb_axim_write_config_func9;
100 uint32_t paxb_axim_read_config_func9;
101 uint32_t paxb_axim_write_config_func10;
102 uint32_t paxb_axim_read_config_func10;
103 uint32_t paxb_axim_write_config_func11;
104 uint32_t paxb_axim_read_config_func11;
105 uint32_t paxb_axim_write_config_func12;
106 uint32_t paxb_axim_read_config_func12;
107 uint32_t paxb_axim_write_config_func13;
108 uint32_t paxb_axim_read_config_func13;
109 uint32_t paxb_axim_write_config_func14;
110 uint32_t paxb_axim_read_config_func14;
111 uint32_t paxb_axim_write_config_func15;
112 uint32_t paxb_axim_read_config_func15;
113 uint32_t paxb_default_imap_lower;
114 uint32_t paxb_default_imap_upper;
115 uint32_t paxb_default_imap_axim_write_config;
116 uint32_t paxb_default_imap_axim_read_config;
123 uint32_t paxb_override_window0_cfg0;
124 uint32_t paxb_override_window0_cfg1;
125 uint32_t paxb_override_window0_write_cfg;
126 uint32_t paxb_override_window0_read_cfg;
127 uint32_t paxb_override_window1_cfg0;
128 uint32_t paxb_override_window1_cfg1;
129 uint32_t paxb_override_window1_write_cfg;
130 uint32_t paxb_override_window1_read_cfg;
131 uint32_t paxb_msi_base_addr_cfg;
132 uint32_t paxb_msi_high_addr_cfg;
133 uint32_t paxb_msi_window_write_cfg;
134 uint32_t paxb_oarr_func0_msi_page;
135 uint32_t paxb_oarr_func0_msi_page_upper;
143 uint32_t paxb_omap_4_upper;
154 uint32_t paxb_rc_pm_control;
155 uint32_t paxb_rc_pm_status;
156 uint32_t paxb_ep_pm_control;
157 uint32_t paxb_ep_pm_status;
158 uint32_t paxb_ep_ltr_control;
159 uint32_t paxb_ep_ltr_status;
160 uint32_t paxb_ep_obff_status;
161 uint32_t paxb_pcie_error_status;
162 uint32_t paxb_pcie_link_status;
163 uint32_t paxb_ecam_cfg_0;
164 uint32_t paxb_ecam_cfg_1;
165 uint32_t paxb_ecam_cfg_rc;
166 uint32_t paxb_ecam_crs_cfg;
167 uint32_t paxb_ecam_cfg_rd_data;
168 uint32_t paxb_ecam_cmpl_stat;
169 uint32_t paxb_ecam_apb_err_cfg;
170 uint32_t paxb_ecam_apb_ur_resp_cfg;
171 uint32_t paxb_mem_pwr_cfg;
172 uint32_t paxb_mem_iso_cfg;
173 uint32_t paxb_mem_pwr_status;
174 uint32_t paxb_free_cid_cfg;
175 uint32_t paxb_free_cid_status;
176 uint32_t paxb_slave_cfg;
177 uint32_t paxb_slave_pf_vf_offset;
178 uint32_t paxb_cmp_err_tx_cplh_status;
179 uint32_t paxb_cmp_err_tx_cplh_addr_h_status;
180 uint32_t paxb_cmp_err_tx_cplh_addr_l_status;
181 uint32_t paxb_axi_slave_debug_status;
182 uint32_t paxb_paxb_intr_status;
183 uint32_t paxb_paxb_intr_en;
184 uint32_t paxb_paxb_intr_clear;
185 uint32_t paxb_rc_intr_clear_en;
186 uint32_t paxb_rc_intr_status;
187 uint32_t paxb_rc_intr_mask;
188 uint32_t paxb_rc_intr_clear;
189 uint32_t paxb_pcie_cfg_intr_status;
190 uint32_t paxb_pcie_cfg_intr_mask;
191 uint32_t paxb_pcie_cfg_intr_clear;
192 uint32_t paxb_master_intr_status;
193 uint32_t paxb_master_intr_mask;
194 uint32_t paxb_master_intr_clear;
195 uint32_t paxb_slave_intr_status;
196 uint32_t paxb_slave_intr_mask;
197 uint32_t paxb_slave_intr_clear;
198 uint32_t paxb_user_if_intr_status;
199 uint32_t paxb_user_if_intr_mask;
200 uint32_t paxb_user_if_intr_clear;
201 uint32_t paxb_master_underflow_status;
202 uint32_t paxb_master_overflow_status;
203 uint32_t paxb_master_fifo_ecc_corr_status;
204 uint32_t paxb_master_fifo_ecc_uncorr_status;
205 uint32_t paxb_slave_underflow_status;
206 uint32_t paxb_slave_overflow_status;
207 uint32_t paxb_slave_ecc_err_corrected_status;
208 uint32_t paxb_slave_ecc_err_uncor_status;
209 uint32_t paxb_userif_underflow_status;
210 uint32_t paxb_userif_overflow_status;
211 uint32_t paxb_userif_ecc_err_corrected_status;
212 uint32_t paxb_userif_ecc_err_uncor_status;
213 uint32_t paxb_msg_status;
214 uint32_t paxb_msg_header[4];
215 uint32_t paxb_msg_data[8];
216 uint32_t paxb_msg_control;
217 uint32_t paxb_msg_drop_control;
218 uint32_t paxb_snoop_addr_cfg[4];
222 uint32_t paxb_clk_control;
223 uint32_t paxb_rc_pm_control;
224 uint32_t paxb_rc_pm_status;
225 uint32_t paxb_ep_pm_control;
226 uint32_t paxb_ep_pm_status;
227 uint32_t paxb_ep_ltr_control;
228 uint32_t paxb_ep_ltr_status;
229 uint32_t paxb_reserved_0[1];
230 uint32_t paxb_ep_obff_status;
231 uint32_t paxb_pcie_error_status;
232 uint32_t paxb_reserved_1[2];
233 uint32_t paxb_paxb_endianness;
234 uint32_t paxb_apb_timeout_count;
235 uint32_t paxb_paxb_tx_arbiter_priority;
236 uint32_t paxb_reserved_2[1];
237 uint32_t paxb_paxb_rd_cmpl_buf_init_start;
238 uint32_t paxb_paxb_rd_cmpl_buf_init_done;
239 uint32_t paxb_pcie_ordering_rules_enable;
240 uint32_t paxb_axi_slverr_en_for_mem_rd_cmpl;
241 uint32_t paxb_reserved_3[44];
242 uint32_t paxb_pcie_rc_axi_config;
243 uint32_t paxb_pcie_ep_axi_config;
244 uint32_t paxb_pcie_paxb_rx_debug_status_0;
245 uint32_t paxb_pcie_paxb_rx_debug_control_0;
246 uint32_t paxb_reserved_4[4];
247 uint32_t paxb_config_ind_addr;
248 uint32_t paxb_config_ind_data;
249 uint32_t paxb_reserved_5[51];
250 uint32_t paxb_cfg_be;
251 uint32_t paxb_cfg_addr;
252 uint32_t paxb_cfg_data;
253 uint32_t paxb_pcie_sys_eq_page;
254 uint32_t paxb_pcie_sys_msi_page;
255 uint32_t paxb_reserved_6[2];
256 uint32_t paxb_pcie_sys_msi_ctrl[6];
257 uint32_t paxb_reserved_7[10];
258 uint32_t paxb_pcie_sys_eq_head_0;
259 uint32_t paxb_pcie_sys_eq_tail_0;
260 uint32_t paxb_pcie_sys_eq_head_1;
261 uint32_t paxb_pcie_sys_eq_tail_1;
262 uint32_t paxb_pcie_sys_eq_head_2;
263 uint32_t paxb_pcie_sys_eq_tail_2;
264 uint32_t paxb_pcie_sys_eq_head_3;
265 uint32_t paxb_pcie_sys_eq_tail_3;
266 uint32_t paxb_pcie_sys_eq_head_4;
267 uint32_t paxb_pcie_sys_eq_tail_4;
268 uint32_t paxb_pcie_sys_eq_head_5;
269 uint32_t paxb_pcie_sys_eq_tail_5;
270 uint32_t paxb_pcie_sys_eq_tail_early[6];
271 uint32_t paxb_reserved_8[2];
272 uint32_t paxb_pcie_sys_eq_overwritten[6];
273 uint32_t paxb_reserved_9[2];
274 uint32_t paxb_pcie_sys_eq_page_upper;
275 uint32_t paxb_pcie_sys_msi_page_upper;
276 uint32_t paxb_reserved_10[26];
277 uint32_t paxb_pcie_sys_rc_intx_en;
278 uint32_t paxb_pcie_sys_rc_intx_csr;
279 uint32_t paxb_reserved_11[2];
280 uint32_t paxb_pcie_sys_msi_req;
281 uint32_t paxb_pcie_sys_host_intr_en;
282 uint32_t paxb_pcie_sys_host_intr_csr;
283 uint32_t paxb_reserved_12[1];
284 uint32_t paxb_pcie_sys_host_intr[4];
285 uint32_t paxb_pcie_sys_ep_int_en0;
286 uint32_t paxb_pcie_sys_ep_int_en1;
287 uint32_t paxb_reserved_13[2];
288 uint32_t paxb_pcie_sys_ep_int_csr0;
289 uint32_t paxb_pcie_sys_ep_int_csr1;
290 uint32_t paxb_reserved_14[2];
291 uint32_t paxb_cmicd_to_pcie_intr_en;
292 uint32_t paxb_reserved_15[543];
293 uint32_t paxb_func0_imap0[8];
294 uint32_t paxb_func1_imap0[8];
295 uint32_t paxb_func0_imap0_upper[8];
296 uint32_t paxb_func1_imap0_upper[8];
297 uint32_t paxb_reserved_16[16];
300 uint32_t paxb_func0_imap0_0123_regs_type;
301 uint32_t paxb_reserved_17[11];
303 uint32_t paxb_reserved_18[2];
305 uint32_t paxb_reserved_19[1];
306 uint32_t paxb_oarr_func0_msi_page;
307 uint32_t paxb_oarr_func1_msi_page;
308 uint32_t paxb_reserved_20[1];
310 uint32_t paxb_oarr_func0_msi_page_upper;
311 uint32_t paxb_oarr_func1_msi_page_upper;
312 uint32_t paxb_reserved_21[1];
313 uint32_t paxb_func1_iarr_2_size;
322 uint32_t paxb_func0_imap3_axuser[8];
325 uint32_t paxb_func0_imap4_axuser[8];
326 uint32_t paxb_default_imap_lower;
327 uint32_t paxb_default_imap_upper;
328 uint32_t paxb_default_imap_axuser;
329 uint32_t paxb_default_imap_axcache;
330 uint32_t paxb_cfg_tlp_rd_status;
331 uint32_t paxb_reserved_22[7];
332 uint32_t paxb_mem_control;
333 uint32_t paxb_mem_ecc_err_log_0;
334 uint32_t paxb_mem_ecc_err_log_1;
335 uint32_t paxb_pcie_link_status;
336 uint32_t paxb_strap_status;
337 uint32_t paxb_reset_status;
338 uint32_t paxb_reset_enable_in_pcie_link_down;
339 uint32_t paxb_reserved_23[1];
340 uint32_t paxb_paxb_tx_debug_cfg;
341 uint32_t paxb_paxb_misc_config;
342 uint32_t paxb_reserved_24[2];
343 uint32_t paxb_paxb_intr_en;
344 uint32_t paxb_paxb_intr_clear;
345 uint32_t paxb_paxb_intr_status;
346 uint32_t paxb_reserved_25[1];
347 uint32_t paxb_apb_err_en_for_cfg_rd_cmpl;
348 uint32_t paxb_pcie_replay_addr_buf_ecc_log;
349 uint32_t paxb_pcie_replay_data_buf_ecc_log;
350 uint32_t paxb_pcie_dl_to_tl_buf_ecc_log;
351 uint32_t paxb_pcie_tl_to_dl_buf_ecc_log;
352 uint32_t paxb_reserved_26[3];
353 uint32_t paxb_func0_imap0_axuser[8];
354 uint32_t paxb_func1_imap0_axuser[8];
355 uint32_t paxb_func0_imap1_axuser[8];
356 uint32_t paxb_func1_imap1_axuser[8];
357 uint32_t paxb_func0_imap2_axuser;
358 uint32_t paxb_func1_imap2_axuser;
362 static inline void pcie_write32(uint32_t data, uint32_t *addr) in pcie_write32()
367 static inline uint32_t pcie_read32(uint32_t *addr) in pcie_read32()